Mastering EMI Control in PCB Design: How to Choose the Stackup for EMC Design

One of the most important concepts to master when designing PCBs that outperform in terms of Electromagnetic Compatibility (EMC) is the choice of the layer stackup of the PCB.

Figure 1 - Layer Stack Manager tool in Altium Designer

This becomes one of the most significant aspects as it tightly relates to the containment of the electromagnetic fields in our PCB design.

In this third article of the Mastering EMI Control in PCB Design series, we are going to explore these concepts further, and we are also going to take a look at other important EMC concepts.

For a signal to propagate in a circuit, it requires two conductors to form a complete current loop. One conductor carries the signal, and the other provides the return path, ensuring that current can flow, and the signal can be transmitted effectively. One of the conductors we call the signal conductor, and the other we call the signal return and reference conductor. The return reference conductor is so named because its job is to provide not only the reference (or zero volt) for the signal, but also because it has to provide the path of least impedance for the signal current to return to the source that originated it. In order to achieve the path of least impedance, the best configuration would be to choose a plane, instead of a trace, and this plane should have no splits, cuts, or other segmentations that can create impedance discontinuities for the signals.

From this basic concept, we can see that for each layer where we have a signal, we need to have the second conductor, the return reference plane, which provides the return and reference path. By following this simple rule, we can then decide how to design our stackups, simply by matching each signal layer with the adjacent Return Reference Plane (RRP).

Following are a few examples of stackups that will keep electromagnetic interference to a minimum.

Example of 2-layer stackup

For a 2-layer stackup, we can have a configuration where one layer is dedicated to the signals and power traces, while the second layer is a solid return reference plane.

Figure 2 - Example of a 2-layer stackup with Layer Stack Visualizer tool in Altium Designer

The plane should not have splits or other large gaps. This is also important to avoid routing signals over gaps, which can create impedance discontinuities and enlarge the current loop paths, ultimately increasing radiated emissions. If we have traces that need to cross from one layer to another, we want to ensure that the crossing is as short as possible and is not done under other signal traces.

Example for a 4-layer stackup

The same approach can be used for a 4-layer stackup. This stackup is suitable when component and trace density increases and a second layer is needed for routing signal traces. While a 3-layer stackup could achieve a similar configuration, it is typically not the best option for manufacturing purposes, as manufacturers usually offer layer stackups in pairs.

For a 4-layer stackup, there are two efficient configurations:

1. The first configuration has the return reference planes as embedded planes in the stackup. This means that layer 1 and layer 4 will be the signal planes, while layers 2 and 3 will provide the return and reference for the signals on layers 1 and 4, respectively.

2. The second configuration has the return reference planes on layers 1 and 4, which act as a sort of shield for the circuit, while the signal layers are on layers 2 and 3, embedded in the stackup. In this configuration, we want to increase the space between layers 2 and 3 so that the fields of both signals do not interfere with each other. Instead, each signal layer couples with the return reference planes.

In both configurations, stitching vias should also be implemented between the return reference planes. The main purposes of this are to:

• Create a sort of Faraday shield to reduce emissions and external interferences;

• Keep the planes as equipotential as possible and reduce common-mode voltages;

• Provide the return and reference for signals that transition vertically from one layer to another.

In this case, power will also be routed on the signal layers.

Figure 3 - Example of a 4-layer stackup with Layer Stack Visualizer tool in Altium Designer

The case of having one layer fully dedicated to power in a 4-layer stackup is intentionally left out, as this is not recommended for EMC design purposes due to the common-mode voltage noise it can create if not executed correctly. This topic requires more in-depth technicalities, which we will leave for another time.

Example for a 6-layer stackup

The 6-layer stackup provides a higher degree of freedom in how we assign signal and power layers.

Figure 4 - Example of a 6-layer stackup with Layer Stack Visualizer tool in Altium Designer

Two very effective stackups can provide excellent performance in terms of EMC:

1. Stackup 1: Signals are routed on layers 1 and 6, with return reference planes on layers 2 and 5, and additional signal layers on layers 3 and 4. This configuration allows layers 2 and 5 to serve as return and reference planes for all four signal layers, instead of just two. This is made possible by the skin effect, which allows different currents on each side of the planes without mixing. The skin effect is essentially the tendency of an alternating current (AC) to distribute itself within a conductor so that the current density is largest near the surface of the conductor, decreasing towards the center. This phenomenon occurs because the changing magnetic field generated by the AC induces eddy currents that oppose the current flow in the center of the conductor, forcing the current to flow more at the periphery. In this type of stackup, the power nets can be routed along with the signal layers.

2. Stackup 2: Signals are routed on layers 1 and 6, with layers 2 and 5 serving as return reference layers. In this configuration, layers 3 and 4 are used as power planes. This stackup is highly effective, especially when more power is required or a low impedance power delivery network is needed. It is recommended to use solid, homogeneous planes for both the return reference layers and power layers. Using different polygons on a single layer is not advisable, as this can generate common-mode noise and result in radiated emissions when cables are connected. Dedicate one plane per voltage to avoid these issues and improve the power delivery network (PDN) of the board.

As with the 4-layer stackup, ensure there is sufficient distance between internal signal and power layers to avoid coupling between them, while maximizing coupling with the return reference layers. Also, stitching vias between return reference planes should be implemented when possible.

Examples of Simple Multilayer Stackups with Altium Designer

Luckily, choosing the PCB stackup becomes easier with Altium Designer®.

With the integrated Layer Stack Manager tool, you can create custom stackups for your PCBs or use preset stackups, making the job of the PCB designer much easier. The Layer Stack Manager tool also allows you to create more advanced types of stackups, where you can also calculate the characteristic impedance for your signals without the need for third-party calculators.

This is one of the many features of Altium Designer® that allows for seamless and accurate PCB project creation, making the design process not only easier but also more enjoyable.

In the next article, we will explore how to design and optimize PCBs for low EMI. Be sure to stay tuned by following our pages and social media so you don’t miss it.

In the meantime, you can begin your free trial of Altium Designer® + Altium 365™ today and elevate your PCB design projects to the next level.