SPI vs. I2C: How to Choose the Best Protocol for Your Memory Chips

Zachariah Peterson
|  Created: August 12, 2022
SPI vs. I2C

SPI and I2C are probably the most commonly used digital protocols to connect integrated circuits in a diverse array of products. SPI and I2C are both easy-to-use, hard-to-break serial digital protocols that are quite easy to route from a signal integrity perspective. Unlike impedance-controlled high-speed differential serial protocols, these two protocols do not have an impedance specification and will often be considered electrically short. This means that, on the PCB, the design requirements are relatively simple and there is still some freedom within the standard to tune the performance as you would like.

One of the common implementations of SPI and I2C in a PCB layout is as a protocol for reading and writing to an external Flash memory. Flash chips are a very common component in embedded systems and can offer high capacities of non-volatile memory up to Gb values. When choosing a memory chip, you'll want to match the application requirements and functionality with the bus speed you need for read and write operations in your memory chip. There is also the matter of the type of Flash memory you'll need to access (NOR vs. NAND).

SPI and I2C Comparison

The Serial Peripheral Interface (SPI) and Inter-Integrated Circuit (I2C) protocols are both simple serial digital protocols that run at low to moderate speeds. These two interfaces have some common characteristics:

  • They use more than one wire for sending/receiving data
  • The clock is source-synchronous, meaning there is a single trace that carries the clock line
  • Other chips on the bus are addressable or toggle-able
  • Most microcontrollers will have one or both of these interfaces integrated
  • The signal level can be set by the core voltage given to the chip
  • Neither of these interfaces has an impedance requirement

Clearly, these interfaces are very similar. They do have some important differences as summarized in the table below.

 

I2C

SPI

Net names

- Serial data (SDA)

- Serial clock (SCL, sometimes named SCK)

- Master-in, slave out (MISO)

- Master-out, slave in (MOSI)

- Serial clock (SCK or SCLK)

- Chip select (CS, optional)

Topology

- Broadcast bus topology

- Shared MISO/MOSI/SCK

- Star for CS pins

Data rate

- Standard mode: up to 100 kbps

- Fast mode: up to 400 kbps

- Fast mode plus: up to 1 Mbps

- High-speed mode: up to 3.4 Mpbs

- Fixed by clock window time, reaches up to 60 Mbps

Rise/fall times

- Depends on bus capacitance and pull-up resistor values (use RC time constant)

- Specified for a given load impedance

Addressing

- Address pins fixed on each component

- CS pins used in the main controller to toggle chips (can be toggled with GPIOs or dedicated CS pins)

Directionality - Half duplex - Full duplex
Signal driving - Open-drain - Push-pull (with CMOS buffer)

 

The SPI standard offers higher data rates and can run with much faster edge rates compared to I2C. Due to the use of pullups on I2C, the typically high bus capacitance, and the fact that the driving method is open-drain, I2C buses can have rise times reaching 100's of nanoseconds. SPI buses can have rise times as low as 1 ns for advanced components driving low load capacitances, which means they may exhibit transient ringing during switching. SPI lines are also much more likely to produce crosstalk because their switching speed is so fast. To learn more about these two protocols and signal integrity in SPI buses, read the following resources.

Important Considerations When Choosing Between SPI and I2C for Memory Chips

Accessing NAND vs. NOR Flash Memories

In this section I don't want to get into the particulars of NAND vs. NOR Flash memories, instead I want to focus on how each is accessed with a serial protocol. Both types of Flash chips can be accessed with an SPI or I2C bus if you can procure the right memory component:

  • NOR Flash - This is overwhelmingly accessed using SPI, even on smaller and slower Flash chips. Slower chips are available that can be accessed with I2C.
  • NAND Flash - This is overwhelmingly accessed using a parallel bus, but chips with I2C and SPI buses are available in approximately equal number.

If you look on Octopart and use the filter features, you'll be able to locate some high-capacity memories that use either interface.

I2C to SPI Interface Bridging For Memories

If you need to convert between an I2C and SPI interface, you can use an interface bridge. These components convert the data format between these interfaces, thus a component that might only have an SPI bus can then access peripheral components that only have an I2C bus. This includes memory chips, although if the controller is only using I2C and the memory is using SPI then the speed might be limited and the receiving component might not work due to long rise times.

To overcome this limitation with I2C, it's best to use a controller with SPI, and then use the interface bridge to access a peripheral that only has I2C. Note that the SPI side will have to be clocked lower to ensure it can be used at I2C speeds. This would be done in the following topology:

SPI vs I2C interface bridge
Preferred configuratoin where an SPI to I2C interface bridge is needed.

Level Shifting

Another common requirement in open-drain and push-pull serial protocols (where the signal level is set by the core voltage) is level shifting. The simplest way to build a PCB is with a single power source that is regulated down to the desired core voltage, such as with an LDO. In reality, you might have some peripherals that run at a higher voltage (say, 3.3 V) while the main controller runs at lower voltage with multiple rails (2.5 V, 1.8 V, etc.). If your MCU runs at 3V3 but your memory runs at 1V8 (this is a common situation), then you will need to route your SPI or I2C signals through a level shifter. Note that some interface bridges will include a level shifter that connects to two power rails; the topology is shown below.

SPI vs I2C level shifting
Topology used in level shifting.

Once you've located components for your design, how do you decide between an SPI vs. I2C interface? Here are some points that will drive your decision:

Speed: When you’re transferring data in bulk or have a tight window to verify user input against the data stored in a memory chip, every single microsecond counts. If repeated read and write capability is needed in real time with the rest of your system, then use SPI. If the controller only needs to occasionally read or write from memory, then use I2C.

Controller: If you're using a very small MCU or peripheral and you have very few pins to spare, then you should go with I2C. In fact, you probably won't have a choice with some microcontrollers. For example, the classic ATTiny MCUs only have I2C, so if they need data from an external memory then you will have to find a memory chip that supports I2C.

Power: If you’re designing a battery-operated device that needs to repeatedly access data, you might opt for SPI as the interface will use less average power than an I2C interface.

 Car zooming with lights all around
If speed matters, choose SPI.

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About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 1000+ technical blogs on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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