Eliminate the Crosstalk: LVDS Routing and the Art of Differential Signaling

October 10, 2018 Altium Designer

PCB semiconductor

 

During a typical baseball game, coaches use the silent language of hand signals to instruct batters and baserunners while catchers use similar signs to recommend pitches to pitchers. Players in the outfield and the infield use hand signals to find the right locations when anticipating the skills of a batter.

 

Electronics has its own version of a silent language with the variety of signals exchanged almost instantaneously within a circuit. Single-ended signaling features a transmitter generating a single voltage that a receiver compares with a fixed reference voltage.

 

Differential signaling uses two complementary signals placed near one another to transmit information. During operation, differential signals excite the coupled transmission line and form a differential pair. A transmitter sends the same electrical signal as a differential pair of signals with each signal have a conductor. The receiver responds to the electrical difference between the two signals. Conductors in differential signaling can range from twisted pair wiring and ribbon cables to connectors and PCB traces.

 

Low Voltage Differential Signaling or LVDS routing has become the most common differential signaling application and provides high-speed transmission of binary data. Applications based on LVDS use less power, generate minimal EMI, and have greater noise immunity. LVDS operates with data rates as high as 3.125 Gbps and has signal transition times as short as 260 picoseconds.

Missed Signals Ruin the Day

One missed sign can change the direction of a baseball game. In the same way, layout problems contributing to signal quality or electromagnetic compatibility (EMC) problems can harm circuit performance. With high clock and edge rates, PCB interconnects act as transmission lines and—without the proper precautions—can allow anything that can go wrong to go wrong. As mismatched impedances generate reflections, dielectric and dispersion loss occurs, crosstalk becomes a problem, and reduced noise margins emerge, high-speed performance changes into something akin to trudging through knee-deep mud.

 

As you work with LVDS, you should focus on routing and basic processes that include monitoring trace impedance and trace length matching. Good routing practices involve avoiding splits and voids in the reference plane. Traces should never straddle a plane split. Without the correct precautions, an LVDS circuit can experience loss and jitter. Also, widen the spacing between the signal lines and keep the traces apart by at least three times the dielectric height.

A Matched Set

Good baseball teams match the skills of pitchers and catchers. Impedance matching occurs with the impedance of the source equaling the impedance of the trace and the impedance of the load. In addition, impedance matching also depends on the specific requirements establishing the correct trace width and spacing between the differential pairs. Trace impedance depends on the width and thickness of the trace, the dielectric constant of the trace material, and the height between the trace and the reference plane.

 

Every differential pair has a differential impedance that equals the sum of the characteristic impedances of each line. The spacing between the lines determines the amount of mutual coupling and affects the differential impedance. Maintaining the correct, constant differential impedance requires keeping the trace width and spacing uniform along the entire trace length.

 

Any breakdown of impedance matching in the LVDS traces results in the signal reflections and increases in common mode noise that lead to radiated EMI. The reflected signals cause ringing at the receiver that reduces dynamic range and causes false triggering. Since every LVDS output works as a current mode output, the circuit will not operate without termination resistors that close the loop. Termination resistor values match the differential impedance of transmission line.

 

PCB routing

Pay careful attention to your routing practices when working with LVDS

 

Too Many Voices Cause Confusion

At some point during a baseball game, a tense situation requires an on-the-mound conference between the manager, pitcher, catcher, and other players. However, despite the number of players gathered around the pitcher, everyone focuses on the manager’s words.

 

Crosstalk can occur between LVDS signals and single-ended TTL/CMOS signals unless you take a few precautions. When designing your routing patterns, isolate the differential LVDS signals from the single-ended signals. You can accomplish the isolation by placing single-ended signals that reside on the same layer at least 12 millimeters away from the LVDS signals. You can also use power and ground planes to isolate the LVDS signals.

An Interference Call

Baseball players sometimes veer out of the base path and interfere with the path of a throw. In terms of PCB design, reducing EMI always leads back to the stack-up and the location of the power and ground reference planes. You should place each signal layer between the ground lane and the power plane. Decreasing the distance that an electric charge covers from the source to ground reduces inductance. Using an eight-layer stack up as an example, centering the signal layers between the power and ground planes reduces the opportunity for noise.

A Segmented Approach

A keen observer of baseball games will note that the games play out in segments. Middle relievers come into the game at the 6th or 7th inning while setup pitchers and closers enter at the 8th and 9th innings. Managers and coaches pay close attention to the number of pitches thrown and the length of innings.

 

Heated discussion at a baseball game

Don’t let yourself sound like a coach going up against the umpires.

 

Vias, connectors, or serial coupling capacitors can segment differential pair connections. Correct routing ensures that the positive and negative signals synchronously propagate and involves individually matching each segment of the connection with compensated bends.

 

The length of traces can cause problems with loss and jitter for LVDS signals. To reduce those problems and maintain length matching, route long distance traces at an off-angle to the X-Y axis of the PCB layer. When routing high-speed signals, use minimal trace bends to prevent the common mode noise. If the layout requires bends, manufacturers often recommend the use of 135o or greater bends to eliminate jitter and loss. Use the same number of left and right bends to maintain length matching.

 

Wide traces have lower impedances than thin traces over the same distance. Individual segments of the trace bends should measure at least 1.5 times the trace width. The transmission of high-speed signals requires a minimum distance of four times the trace width between adjacent copper.

Running the Right Route

Outfielders practice running the right route to catch a well-hit fly ball. Running the wrong route can cost precious seconds and allow a runner to score.

 

LVDS interfaces have specific requirements for the time of the arrival skew between the differential traces and pairs of signals. Using a high-speed parallel bus as an example, all data signals must arrive within an established time period to meet the setup and hold time requirements of the receiver. When designing the PCB, you cannot exceed the permitted skew and should keep the differential lines parallel.

 

Because differential pair signals require a tight delay skew between the positive and negative signal traces, any differences in electrical and mechanical length can cause errors. To maintain specific trace lengths, use serpentine bends and the keep a minimum distance of four times the trace width between adjacent copper. The length of each serpentine jog should measure at least three times the trace width. Place the serpentine bends at the origin of the length mismatch to ensure synchronous signal propagation.

 

Since the signal speed does not remain equal for different layers, both signals must route on the same layer. You should route all data and clock signals for an LVDS channel on the same layer. With this approach, the LVDS signal pairs and clock pairs become tightly matched.

Use the Right Return Path

Can you imagine a baseball player running the wrong way around the diamond? Incorrect signal return paths in LVDS circuits cause noise coupling and EMI. When routing your signals, always consider the signal current return path. Because differential signals include a positive and negative signal trace, you need to include a return path when routing the signals. If the signal trace uses the power plane as a reference, you need to provide routing that allows the signal to travel back over the power plane.

 

If you need to route the signal over two different reference planes, use a stitching capacitor between the two planes. Place the capacitor near the signal path to maintain a short distance between the forward and return path. The capacitor allows the return current to travel from one plane to another.

 

Keeping track of these tasks while mastering the art of accurate routing can be challenging. Using PCB layout software like Altium Designer simplifies the process. For more tips on LVDS routing and how to deal with incorrect signals, talk to an Altium expert today.

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Altium Designer

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