What is Propagation Delay in High Speed PCB Design?

Zachariah Peterson
|  Created: May 20, 2020  |  Updated: March 2, 2024
What is Propagation Delay

Every electromagnetic signal, whether it's a digital signal traveling in a PCB or a wave propagating through the air between antennas, will have a finite speed. This finite speed is the propagation delay for a signal. It is an important quantity for several reasons, which are primarily found in high-speed PCB design and in RF systems design. Differential digital interfaces and phase-sensitive RF designs are the most important areas where propagation delay is important and becomes and important parameter in a PCB layout.

In this article, I'll explain exactly where propagation delay is used in some basic calculations for PCB design. We'll see shortly that the important uses of propagation delay arise when we need to ensure consistent phase response across multiple interconnects in a PCB.

What is Propagation Delay?

Propagation delay refers to the inverse of the speed of a traveling electromagnetic signal. It is primarily used in the PCB industry to refer to signal speed, while integrated circuit designers use the same term to refer to the time required for a logic state to toggle from an input to an output. In a PCB, the propagation delay experienced by a signal is expressed in units of time per distance (inverse of speed). In other words, as long as you know the speed of light for a signal in a PCB, invert the value and you have the propagation delay.

When a PCB designer is planning a transmission line design for an impedance controlled interface, they may need to calculate the propagation delay for a signal on that line. The factors that determine the propagation delay of a signal include:

  • Dielectric constant of the substrate
  • The impedance value (really the geometry of the transmission line)
  • The distance to the transmission line's reference plane(s)
  • For a differential pair, the distance to the other trace in the pair
  • Fiber weave effects in the PCB dielectric material

Definition for Striplines and Microstrips

The simplest definition comes from looking at the speed of light in vacuum; by using your PCB material's Dk value, you can determine the signal speed:

Invert this value, and you have the propagation delay in units of time per distance. A typical value for a 50 Ohm microstrip is ~150 ps/inch, and for striplines a typical value is ~171 ps/inch; both assume Dk = 4 dielectrics. Why should a microstrip have a different propagation delay compared to a stripline? This is because of the dependence of the geometry of the interconnect. For a stripline, the routing is on the surface layer and some of the electric field lines will pass through air, so the signal speed is defined using an "effective" Dk value:

Next, we need a formula for the effectivec Dk for microstrip lines. This value depends on the geometry of the transmission line and it can be calculated from Maxwell's equations. Using the quasi-TEM theory for transmission lines, it has been shown that the propagation delay for a signal on a microstrip is as follows:

Here, w and h are the width of the microstrip trace and the distance to the ground plane, respectively. This formula can be used by hand and is known to be accurate over a range of target impedance values within the quasi-TEM limit.

Definition From Transmission Line Theory

More generally, there is a definition for propagation delay that can be found directly from transmission line theory. This formula for the propagation delay requires you to know the distributed circuit element values for your particular transmission line:

Once again, invert this equation and you get the propagation delay.

This equation is universally true as a quasi-TEM model, but it is not so easy to use for design. Instead, it is normally used as part of a regression model, where the distributed element values in the formula are determined through an extraction process from network parameter measurements in an experiment or simulation. The processes and algorithms used for circuit model extraction are topics for another article.

Where Propagation Delay is Used

In general, you do not need to know or calculate the propagation delay for every single signal or trace connection on your PCB. 

Timing in High-Speed PCB Design

High-speed signals, whether they are on source-synchronous interfaces, on parallel buses, or on serial differential pairs, need to arrive at a receiver within some timing margin. In general, when the rise time of the signals are faster, the timing margin will be smaller. This means that the propagation constant must be known in order to apply length tuning, which ensures signals arrive within the required timing margin.

The main timing constraint that determines whether a high-speed interface will work is the timing mismatch between two signals, which we will call Δt. The relationship between the allowed length mismatch and the allowed timing mismatch is given by:

This length mismatch/timing mismatch arises in three important instances:

  • Between signals in a parallel bus (such as DDR)
  • Between two traces in a differential pair
  • Between multiple differential pairs

As an example of length tuning applied in a real situation, I like to show the below image of a CSI-2 interface on an FPGA with its escape routing. The image below shows five differential pairs (4 signal lanes and a clock lane) that make up a CSI-2 interface, which would normally be routed into a camera connector. We can see one length tuning section applied in the differential net AWR_3_CSI2_TX0, which ensures that the timing mismatch between these two traces is minimized. Because the design software knows the allowed timing mismatch (it's selected by the designer) and the propagation delay (it's set in the design rules), the PCB layout tool can check for a length mismatch by automatically applying the above formula.

The best PCB design software will automatically convert between the allowed timing mismatch and the actual length mismatch between two signals, but only as long as one of these constraints is defined in your design rules and the propagation delay is known. If your desingn software can perform an impedance calculation for your mismatched nets, then it can also determine the propagation delay for that specific transmission line geometry, and you won't have to calculate this by hand.

Determining Input Impedance

Another important area where a propagation delay calculation is needed, both in RF design and in digital design, is determination of input impedance. This is used to determine:

In the former case, we want to determine whether an impedance matching network (stub or discretes) will produce the desired target input impedance. In the latter case, we want to determine at what frequencies a signal will begin strongly reflecting from an impedance discontinuity. The formula for determining the input impedance between a source and load connected with a transmission line is given in the image below:

From here you can do things like predict the exact frequencies at which a load and source will be perfectly impedance matched by a transmission line of length l and with characteristic impedance Z0.

Phase Response in RF Design

Finally, the other common instance where the propagation delay needs to be known is in the phase response of RF circuits. Some RF designs require engineering the phase response of a signal sourced into an interconnect. The phase response is also related to the propagation delay as follows:

In other words, when a signal with known frequency and propagation delay travels a distance L on an interconnect, we can calculate its phase shift. This phase response is used in areas like printed RF circuit design to account for any effects requiring interference, such as resonators and filters. For example, if you reuqire a phase measurement of an incoming signal with respect to some reference, you will need to know the phase shift of the signal along your interconnect, which requires knowing the propagation delay in the system.

The most important area where phase response matching applies in RF PCB design is in phased array antennas. These antennas are specifically used in high-resolution scanning radar, MIMO wireless systems, and unique mmWave sensors. These systems require phase matching across multiple antenna elements, and each antenna element will have a feedline connecting to a transceiver chip. Phase matching is required to direct beams to targets or mobile device users, and the correct way to enforce phase matching across the entire array is to implement length tuning, similar to what you would do in a large parallel bus of single-ended signals.

A simple example of a 4x series-fed patch antenna array (plus 2 dummy antennas) is shown below. Modern car radars have many more antennas, with virtual array sizes reaching hundreds of antennas.

Radar antenna array PCB

In these systems, the operating frequency is typically in the mmWave range (at WiFi or above), so the transmission lines are typically routed as coplanar waveguides. The design equations for coplanar waveguides are quite different from standard microstrips, so an electromagnetic field solver may be required to determine the propagation delay for these lines.

Whenever you need to design a PCB that accounts for propagation delay, make sure you use the complete set of PCB design features and world-class CAD tools in Altium Designer®. To implement collaboration in today’s cross-disciplinary environment, innovative companies are using the Altium 365 platform to easily share design data and put projects into manufacturing.

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About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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