As part of wireless systems and other devices requiring frequency synthesis, phase-locked loops play an important role in PCB design. So when should you use a phase-locked loop in your system? Like many answers in PCB design, it all depends on your device requirements and application.
When to Use a phase-locked loop
A phase-locked loop has a number of important functions in wireless systems and in systems that require precise clock and signal synchronization across a board. Using a PLL may be a better option than repetitively tuning the length of traces in a PCB to compensate for skew in a channel carrying parallel or serial data. A phase-locked loop can also be used to remove phase noise from a reference signal by synchronizing with a voltage-controlled oscillator (VCO).
At low speeds/low frequencies, phase noise in a given driver is typically low enough that you do not need to take advantage of a phase-locked loop to compensate for it. Rise times are already longer than the delay/jitter caused by phase noise, unless the board occupies a very large area. At that point, only the longest sets of traces would need to be length matched so that signal rise times in traces carrying data match to a reference signal within the limit of phase noise.
Therefore, phase-locked loops are really more useful for synchronization in higher speed signals. If data traverses a number of components in between its source and destination (this is not a typical situation in many devices and topologies), propagation delay in logic circuits can accumulate to produce significant delay. In addition, noise sources—including phase noise—add in quadrature, increasing jitter as data traverses multiple devices. Both factors can induce significant delay between data and the system clock when the clock signal that does not traverse the same components.
A phase-locked loop has a number of uses aside from synchronizing digital data with a system clock or other reference signal. An analog or digital phase-locked loop can also be used for frequency synthesis at higher or lower frequencies than some reference. In terms of digital synthesis, a phase-locked loop can be used to decrease or increase the repetition rate of a stream of digital pulses. In both cases, the oscillation/repetition rate can reach 10’s of GHz with commercially available and experimental phase-locked loops, allowing them to support 5G systems and many RF applications.
The Role of a VCO in a Phase-locked loop
Phase-locked loops use negative feedback from a VCO in analog applications, or a numerically controlled oscillator (NCO) in digital applications. In analog applications, the frequency of the output from a VCO or NCO depends on its input voltage or a digital input, respectively. In either case, the output from the PLL will be proportional to the phase difference between the reference input signal. When the phase difference (and thus the output) do not change over time, then the two signals are locked at the same frequency.
In an RF system, the output from an analog VCO depends on the input voltage, making it useful for modulating a reference clock signal. Within a phase-locked loop, the VCO effectively locks onto a particular reference through use of a loop filter. In analog phase-locked loops, the loop filter takes some time to lock onto the desired reference signal (reaching ~100 ns).
The output from the loop filter also has a special place within a phase-locked loop. When the VCO is used to lock onto a desired carrier signal, a frequency or phase-modulated signal will generally modulate at a rate that is much faster than the phase-locked loop’s locking time. In this case, the loop filter will output an error signal that is proportional to the instantaneous phase difference between the reference and the VCO signal. When a modulated reference signal is input to the phase-locked loop as a carrier, this error signal is actually the demodulated signal.
Ever play with a synthesizer? You’re really playing with a VCO
VCO Layout as Part of a Phase-locked loop
Phase-locked loops are available on the market that reach the low tens of GHz, but these frequencies are still too low to accommodate the higher-order frequencies required in 5G systems or high frequency RF systems. In this case, you may need to design your own VCO for use in a phase-locked loop.
A phase-locked loop already has a place in the transmitting section for an RF system. The output from a VCO can be used to apply modulation to a carrier signal, which can then be sent to a transmitting antenna. This can be done with a T-section that uses three resistors to match the antenna impedance to the output impedance of the VCO.
The bandwidth of a VCO will affect its sensitivity to power-supply noise and its own phase noise. Wider bandwidth voltage VCOs may have increased sensitivity to power-supply noise, thus power regulators with ultralow noise are recommended in order to minimize the phase noise on the VCO output. Using a narrowband VCO will only accommodate a narrower range of frequencies, and this should be considered during design.
The issue with power-supply noise requires precise decoupling, and a decoupling network should be placed very close to the power pins of any ICs used to design the VCO. This will provide steady DC voltage to these ICs and suppress ringing in the power bus or power plane when digital ICs elsewhere on the board switch. Any decoupling/bypassing capacitors should use their own vias to connect back to the ground plane.
It is best to use an alternative high speed laminate with lower loss tangent for boards that include phase-locked loops and VCOs for use above WiFi frequencies. Rogers 4350 or other high speed/high frequency compatible material should be used instead of FR4. Traces carrying RF signals on these boards should be made as short as possible to prevent transmission line behavior and radiation.
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About the AuthorMore Content by Zachariah Peterson