PCB Routing Tips: Navigating Your Way Through BGA Fanout Options

September 27, 2018 Altium Designer

Inspecting a BGA chip

 

Tom rose through the ranks of his company to become the new vice-president. He had worked hard, forged relationships, and consistently built his knowledge about the company. Unfortunately, Tom also contracted a serious disease called acronymitis that spread like the plague throughout key sectors of the company. Try as he might, Tom could not resist speaking in acronyms. Sometimes, his wife would hear him talking in his sleep—in acronyms.

Unfortunately, the only known cure for acronymitis is an obscure elixir once sold by traveling hucksters during the mid-1800s. Although the elixir had the same appearance, consistency, and flavor of common creek water, it could cure any man, woman, or child from explaining that “The CMR for DER offered by a TPS has been studied by FERC, NERC, RTOs, and ISOs.”

Acronyms Don’t Die They Just Slowly Fade Away

The PCB world certainly has no shortage of acronyms. Ball Grid Arrays (BGA) enable PCB designers to easily route high-density connections to integrated circuits. The underside of the surface mount technology (SMT) chip package establishes connectivity while the upper side of the array provides an easy-to-use package for integrated circuits (IC) such as field-programmable gate arrays (FPGA), application specific integrated circuits (ASICS), microcontrollers, and microprocessors that have more than 100 pins. With the pins placed in a grid pattern at the bottom of the package, each pin has a pad with a ball of solder that creates an electrical connection to a matching copper pad in the PCB. Ball Grid Arrays have low lead inductance because of the shorter lead length within the device.

BGAs save space by allowing connections to exist under the quad flat pack style package as well as around the package. As SMT technologies have improved, manufacturers have produced different types of Ball Grid Arrays with better thermal and electrical characteristics:

BGA Type

BGA Acronym

BGA Characteristics

Molded Array Process Ball Grid Array

MAPBGA

  • Low-cost

  • Low-to-mid-performance devices

  • Low inductance

  • Easy surface mounting

  • Small footprint

Plastic Ball Grid Array

PBGA

  • Low-cost

  • Mid-to-high performance devices

  • Low inductance

  • Easy surface mounting

  • Requires additional copper layers for increased power dissipation

Thermally Enhanced Plastic Ball Grid Array

TEPBGA

  • High heat dissipation levels

  • Requires thick copper planes to draw heat from the die to the board

Tape Ball Grid Array

TBGA

  • Mid-to-high end devices

  • High thermal performance without external heat sinks or fans

Package on Package

PoP

  • Space-saving stacking design

MicroBGA

MicroBGA

  • Smaller, space-saving design

 

BGAs provide the power and ground planes for low inductances, controlled impedances for signals, and wide spacing between connections for better solder contact. The reduced package thickness observed in BGAs works well for thinner electronic products.

Because BGAs have a low thermal resistance, the package routes heat away from the pads. Any heat generated by an integrated circuit conducts onto the PCB. From an efficiency perspective, BGA devices can generate more heat while not using fans or heat sinks.

Keep Your Eye on the Ball

No matter the type, every Ball Grid Adapter has characteristics that affect the minimum trace width, via styles, and required layer count. While the Ball Diameter represents the diameter of the solder ball, pitch describes the spacing between two adjacent balls. Ball diameters and pitch configurations vary with the different types of BGAs.

 

Close-up of Ball Grid Array (BGA

Make sure you know how to navigate a BGA before you attempt to design with one.

 

In addition to Ball Diameter and Pitch, BGAs have footprints that depend on the number of pins and the number of evenly spaced rows and columns that make up the grid. They also have different pin counts with the pins arranged in evenly spaced rows and columns that make up the grid. While the nominal ball diameter for a BGA depends on the footprint, the pad size used for the PCB also depends on the footprint and the selection of either solder-masked-defined (SMD) or non-solder-mask-defined (NSMD) pads. You can determine the distance between adjacent pads by subtracting the diameter of the pad from the pitch.

Counting Pins Will Make You Sleepy

BGAs may have as many as 1000 pins. The sheer number of pins requires multiple signal layers for routing the traces. One of the challenges faced by designers working with BGA fanouts involves finding exit routes that do not create fabrication or noise problems. Your fanout strategy must consider the number of signal pins, the pad and via sizes, trace width spacing, and the number of signal layers required for the fanout.

Your decisions about trace width and the number of layers and vias depends on the standards recommended by manufacturers as well as overall cost. The size of the vias depends on PCB thickness, the number of traces routed from one area of the via, and the device pitch. Each additional layer increases the PCB’s cost. Furthermore, your design team may elect to decrease opportunities for noise by sandwiching signal layers between ground plane layers. Decreasing the spacing between traces causes an increase in the board fabrication cost.

Minimizing the number of signal I/O pins results in fewer layers. You can calculate the number of signal layers needed for a BGA by allocating a signal layer for every two rows or columns of pins. With that knowledge in hand, you can begin to determine your trace width and route traces from the pads. Your BGA fanout strategy also depends on factors like ball pitch, land diameter, via types, and trace spacing.

Routing a circuit board with interactive routing

Having a strong routing tool will enable your design to be secure through production.

 

Routing for a typical BGA fanout begins with the outermost layer with the traces radiating outward with no vias. As you move to the second layer, you can place traces between adjacent pads and traces. Maintain the correct distance between adjacent pads. As you work with the outermost layer and second layer traces, you will use all available space for paths.

With all the path space already used, you will need to introduce a second signal layer for routing the inner pad traces. You can use a technique called the “dog bone” to allow the traces from one set of pads to pass to a different signal or plane level. The “dog bone” relies on the placement of a via at the center of four adjacent pads. With this configuration, a short trace measuring at least 0.005” long passes from the BGA pad through the via. Using the dog bone allows another layer to access the inner pads. The vias must fit between the pads while maintaining the correct clearance.

As you establish the dog bone fan-out, you find that the method partitions the PCB into four quadrants. The area between two vias defines a channel for running traces. While the channel area between adjacent via pads establishes the smallest area for routing the signal, a wide channel in the middle of the BGA connects multiple traces.

Dog bone fan-outs work with BGAs with a 0.5 millimeter or higher ball pitch. The higher ball pitch allows one or two traces to route through a channel. Designers use another routing technique called the “via in pad” for BGAs that have a ball pitch lower than 0.5 millimeters. The “via in pad” (VIP) technology places the via directly under the solder pad and requires another step to seal the pad.

Manufacturers publish design guidelines to assist you with BGA fanouts. PCB design software like Altium Designer includes rules that specify fanout options for fanning out the pads that connect to signal or power plane nets. Combining manufacturer guidelines with design software rules maximizes your chances of successfully routing your board. Talk to an Altium expert today to learn more.

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Altium Designer

PCB Design Tools for Electronics Design and DFM. Information for EDA Leaders.

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