I recently moved into a new apartment, and it was time to unpack all of my electronics. When I reached into the box to pull out my audio cords, power cords, and extension cords, everything was a tangled, helpless mess. If I had taken more time to pack them properly, they probably would not have become tangled. If you are routing traces between an FPGA and external logic ICs on your PCB, your design might look like my mess of cords on moving day.
No matter how much planning goes into your PCB designs, you may find yourself in the position of swapping pins during trace routing. Moving between schematic and layout leaves room for ambiguity, and it is up to the to route traces such that crossover is minimized. If you find that your design is a rat’s nest, it can be cleaned up by pin swapping.
Pin swapping may not be so important in simpler designs with a low number of components. But in devices that have components with high pin density, like FPGAs or microcontrollers, routing your signals can quickly become a complicated mess of crisscrossing connections in your PCB layout.
FPGA Pin Swapping
The trend towards system-on-a-chip devices has increased the use of FPGAs. Using FPGA technology allows designers to implement nearly any logic-based functionality in their device. Rather than designing a system with hundreds or even thousands of logic ICs, FPGAs provide the same design freedom in a single IC. The challenge to integrating an FPGA on your PCB successfully is in routing your power, ground, configuration, clock, and user I/O signals properly.
Connecting the right traces to an FPGA on a PCB can be a difficult task. On the FPGA side, the pins are assigned to the hardware description language signals that form the logic implemented in the FPGA. The pins have to be connected to the proper net that will connect it to other components on the PCB. Current devices can have over 1500 pins, and performing pin swaps manually can be time-consuming and is prone to mistakes.
A 169-pin integrated circuit
Certain FPGA pins cannot be swapped without also swapping other components on the PCB. For example, ground and I/O pins, power and I/O pins, or power and ground pins should not be swapped with each other. If you do make these swaps in your layout, redesigns will be required on other of the board. Thankfully, a good piece of design software with built-in rules checks can prevent this mistake.
I/O pins within a group, however, can be swapped with each other, and this may help clean up your PCB design. Be careful before you start swapping I/O pins willy-nilly. Some pins may be part of a differential pair, and these should only be swapped with another differential pair. While some pins have the capability to be bidirectional, they may be configured as solely input or output on the schematic. Input pins should not be swapped with output pins and vice versa.
As FPGAs and other components may be required to interface with an external logic IC, gate swapping may also be necessary to clean up your PCB design. Gate swapping can involve rearranging trace routing to different pins on the IC, or even swapping the IC out for one with a different pin layout. Both strategies can help minimize crossover and clean up your signal traces.
Gate swapping can only be performed in chips that have interchangeable devices in a single package. Two good examples are the 74xx00 quad-NAND package and the CD4000 three input NAND package. These chips have multiple identical devices in a single package, so you can move your traces to a different gate without affecting your overall design.
Exchanging one IC for a different IC is another beast. A different IC may have a different pin layout that allows you to detangle your traces. If you must swap ICs, the electrical input and output levels should be compatible with both IC packages. For example, changing out your IC may result in a new fan-out value and swapping may not be possible if too many gates are driven downstream. It is also important to swap ICs within the same logic family (TTL or CMOS).
Swapping logic ICs without sacrificing performance requires a comprehensive component with predefined electrical characteristics and pin layout. Be careful when accommodating pin swapping by using a different IC. You will need to pay attention to issues like fan-in and fan-out, propagation delay, and power and ground pin placement in your new IC. A different propagation delay will be especially important in high speed devices.
Logic ICs in DIP packaging. Editorial Credit: Panuwat Phothikamol / Shutterstock.com
In low power devices, pin swapping on logic ICs can reduce power dissipation by lowering the capacitive loads on your logic gates. The pins should be swapped so that the trace carrying the highest frequency signal is connected to the pin with the lowest capacitive load. This is especially important when working with asymmetric logic gates.
If you are interested in simplifying pin swapping and routing, Altium Designer® can help you streamline your PCB layout. The ActiveRoute® tool can help you efficiently arrange your traces and can reduce crossover with automated pin swapping. To learn more, talk to an Altium expert.
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