Welcome to the fourth article in our series on Mastering EMI Control in PCB Design. In this installment, we will explore advanced aspects of managing Electromagnetic Interference (EMI) that are crucial for effective PCB design.
When designing printed circuit boards (PCBs), a key challenge is ensuring that your design can pass both radiated and conducted emissions tests. This is vital for meeting regulatory standards and ensuring that your PCB functions properly in its intended environment, without causing interferences to other devices and systems.
Equally important is achieving immunity against both external and internal emissions, which helps ensure the reliability and performance of your final product.
Figure 1 - Example of PCB Design in Altium Designer®
When designing for Electromagnetic Interference (EMI), it's important to understand that emissions are primarily caused by changing currents in our circuits, rather than by voltage. This means that all circuits will inevitably emit some level of electromagnetic radiation due to the inherent current changes within them. The key challenge for designers is to manage and control the extent of this radiation.
To achieve better Electromagnetic Compatibility (EMC), we need to focus on designing printed circuit boards that effectively contain and minimize these electromagnetic emissions.
This involves addressing two main types of emissions:
Figure 2 - Differential vs Common mode currents in a circuit (return path of common mode current not shown). Ref: Dario Fresu
The simplest way to understand these currents is to think of differential mode currents as flowing in "opposite directions" through different paths, while common mode currents flow in the same "common" direction along the circuit paths.
Differential mode currents are essential for the normal operation of a circuit. These currents flow between integrated circuits (ICs) and components, and are part of the design of the circuit in the PCB.
They move in loops defined by the circuit layout, and the size of these loops affects the level of emissions produced. The larger the loop (i.e., the greater the area), the higher the emissions. Additionally, higher frequencies result in increased emissions.
To reduce these emissions, we have a few strategies:
Reducing current and frequency (options 1 and 2) is often impractical because they can significantly impact the circuit's efficiency. The most practical approach, which PCB designers can control more directly, is to minimize the area enclosed by these current loops.
Figure 3 - Example of a current loop in a PCB with Altium Designer®
A highly effective method is to use a return reference plane close to the signal traces in the layer stackup. By doing so, the area enclosed by the forward and return current becomes very small, minimizing the emissions. This, along with keeping the signal traces as short as possible, will yield the best outcome in terms of reducing emissions from differential mode currents.
Of course, component placement, signal crosstalk reduction, and managing other coupling mechanisms that can transfer noise to nearby cables are also important for reducing emissions. However, these factors are secondary to the primary technique of minimizing the area of current loops.
This technique has a more direct, and significant impact on reducing emissions because it addresses the root cause of differential mode currents’ emissions.
Another important type of current, that designers need to be aware of, is common-mode currents. Unlike differential mode currents, which are intentionally designed into the circuit, common-mode currents are not explicitly accounted for in the schematics. These currents are not necessary for the circuit's operation and primarily arise from parasitics within the design.
Identifying and controlling these parasitic currents can be quite challenging because their sources are not always obvious. Common-mode currents are typically generated when differential mode currents flow through parasitic elements in the circuit.
Figure 4 - Gaps in return planes are often a cause of common-mode radiation (Altium Designer®)
These parasitics are found especially in the return reference conductors, commonly known as the “Ground” or “Signal Ground“ conductors. The issue with parasitics in the return reference conductors mostly arises because, in reality, components and conductors are not perfect, and far from being ideal.
For example, copper traces in a circuit not only have resistance but also exhibit inductance and capacitance. These parasitic properties become increasingly significant as signal frequencies rise.
Unlike differential mode emissions, which are primarily affected by the size of the current loop, common-mode currents are mainly influenced by the lengths of the conductors and the noise frequency. However, the impact of conductor length becomes less significant beyond a certain point, which we will not explore further here in this article.
For electrically short cables, common-mode current emissions can be modeled as dipole (or monopole) antenna transmission, rather than loop antenna transmission. This change in modeling affects how emissions are produced and controlled.
To effectively reduce emissions from common-mode currents at the source, we should consider the following strategies:
A key strategy is to focus on reducing the length of signal traces. While it may not always be possible to shorten all conductors due to system constraints, designers should strive to minimize trace lengths wherever feasible. This effort helps to mitigate emissions from the PCB, especially as signal frequencies continue to rise.
Using a solid copper plane as a return and reference plane is another effective technique. This method reduces the inductance that the return current must go through, thereby decreasing the common-mode voltage source that drives these emissions.
By providing a low-impedance path for return currents, a solid copper plane (with no splits, or cuts) helps in maintaining signal integrity and reducing EMI.
Another recommended technique for reducing common-mode emissions in multilayer stackups with multiple return reference planes is the use of stitching vias between these planes. Stitching vias, connect the different return reference layers, ensuring that they remain at the same electrical potential. This connection helps to reduce the common-mode voltage sources that drive dipole (or monopole) antenna mode emissions, which can significantly diminish unwanted noise and EMI.
Figure 5 - Example of stitching vias in Altium Designer®
In addition to reducing common-mode emissions, stitching vias are vital for providing a reliable current return path, and reference potential for signals transitioning between layers in the stackup. This prevents emissions from occurring between the planes, which could otherwise interfere not only with EMI, but also with the signal integrity and overall performance of the PCB.
When designing printed circuit boards (PCBs) with effective Electromagnetic Interference (EMI) control in mind, having the right tools is essential. Advanced PCB design software enables you to manage various design parameters, and ensures your boards are crafted with exceptional precision and efficiency. These tools are crucial for handling complex design requirements and confirming that your EMI mitigation strategies are correctly applied, leading to more reliable and high-performing PCBs.
Altium Designer® stands out as an exemplary tool in this domain, offering seamless integration into your design workflow. It provides the flexibility and advanced capabilities needed to fully leverage your expertise and passion for PCB design, making it easier to implement effective EMI control strategies.
To keep refining your PCB designs, staying informed is key. In our next article, we'll cover decoupling strategies for Power Distribution Networks (PDN), providing you with even more insights to improve your design practices.
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