LVDS: Low Voltage Differential Signals for High Speed and Low Noise

Low-voltage differential signaling (LVDS) is a digital signal bus defined by ANSI TIA/EIA 644. The standard specifies technical characteristics which communicate differential, serial communications. Differential, serial communications came about early in the digital age when parallel buses were no longer able to physically support increasingly large data communication streams transferred on parallel buses. Developers moved into solutions by evolving serial bit protocols and their physical attributes.

The first LVDS digital signal buses used four pairs of physical signal lines to represent clock, control, address, and data. Each pair was made of an equal and opposite signal whose difference was used by the receiver to collect information. With equal and opposite signal pairs, LVDS uses electrical and magnetic fields to cancel noise from common-mode voltage. Noise acquired on pairs, equal and opposite, quickly vanish at the receiver.

Differential pairs able to accurately cancel noise resulted in the realization that signals could travel on a very low rail requiring minimal power. Natural immunity to noise events ubiquitous in electrical systems overcame previous design challenges for transmitting megabit, and presently gigabit, streams of data. Transmitters inject 3.5mA of current into signal lines terminated with a 100Ω resistor at the receiver using milli-Watts of power. Developers built video streaming with exceptionally low power budgets.

Defining Characteristics of LVDS

Transmitting large data streams with very small power budgets moved video streaming into multiple applications. Simultaneous streaming on low power budgets enables multiple devices working together from the same power source. Current-driven transceivers remove the need for power decoupling leading to less interference in the power and ground planes. With immunity to interference, data streams are able to transfer on longer cables and are able to coexist in noisy environments such as automobiles.

BLVDS: Bus low-voltage differential signaling. Provides a powerful new approach to small, fast interfaces across cables and backplanes.

Cat-5: Category 5 cable is a twisted pair cable for computer networks.

ICT: Information and Communication Technologies goods are those that are either intended to fulfill the function of information processing and communication by electronic means, including transmission and display, or which use electronic processing to detect, measure or record physical phenomena or to control physical process.

Jitter: The deviation from true periodicity, often in reference to a clock signal.

LVDS: Low-voltage differential signal. A standard that defines two equal but opposite signals running together, whose difference results in cancellation of common-mode noise.

LVPECL: Low-voltage emitter-coupled logic is a high-speed integrated circuit bipolar transistor logic family.

RS422/485: TIA-485(-A), EIA-485 is a standard defining the electrical characteristics of drivers and receivers for use in serial communication systems.

SerDes: Serializer/Deserializer is a means for converting between serial and parallel data; frequently combined into one IC.

Skew: Clock skew, sometimes called timing skew, is a phenomenon in synchronous digital circuit systems in which the same sourced clock signal arrives at different components at different times.

SMA: SubMiniature version A connectors are semi-precision coaxial RF connectors with 50Ω termination impedance.

TIA: Telecommunications Industry Association brings together communities of interest to shape solutions that enable next-generation ICT products and services across all markets.

TIA/EIA-644: A technical standard that specifies electrical characteristics of differential, serial communications protocol.

Found on National Instruments webpage Understanding LVDS for Digital Test Systems

Many applications throughout the digital landscape use LVDS to transmit data streams. Several standards incorporate electrical and magnetic canceling effects for use with TV interconnects, DVD players, and for computer vision. Newer protocols are being developed for use with Intel and AMD CPUs, but LVDS remains as a solid transmission protocol throughout digital devices and interfaces.

Parameters to Consider When Selecting a LVDS Receiver

LVDS continues to be used in many devices giving way to vendor offerings for ICs able to receive and repeat signal pairs. Below we take a look at two receivers for one pair of LVDS signals and one repeater able to receive one pair and repeat into ten pairs.

Texas Instruments, PDSLVDS1002 3.3-V LVDS Single Channel High Speed Differential Receiver

This part is a LVDS receiver accepting LVDS/BLVDS/LVPECL inputs and outputting 3.3V low-voltage CMOS or TTL signals. It performs with 100-ps typical differential skew and 3.5-ns maximum propagation delay. Running from a 3.3V supply with power off and failsafe protection, it meets or exceeds ANSI TIA/EIA-644-A Standard. There is an evaluation board available, the DSLVDS1001-1002EVM, to evaluate performance and provide functional assessment of the part with input and output connectors to facilitate direct connection to lab equipment or other evaluation tools.

The PDSLVDS1002 is a single channel Low Voltage Differential Signaling (LVDS) receiver designed for applications requiring low power dissipation, low noise and high data rates. In addition, the short circuit fault current is also minimized. The DSLVDS1002 device is designed to support data rates that are at least 400 Mbps (200 MHz) utilizing LVDS technology. The DSLVDS1002 accepts low voltage (+350mV typical) differential input signals and outputs a 3.3-V CMOS/TTL signal. The receivers also support open, shorted, and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions. The DSLVDS1002 is in a 5-lead SOT-23 package that is designed for easy PCB layout.

Found on page 1 of Texas Instruments DSLVDS1002 3.3-V LVDS Single Channel High Speed Differential Receiver datasheet

This part may be paired with companion single line drivers or with any LVDS driver and is found in devices such as board-to-board communications, test and measurement equipment, motor drives, wireless infrastructure, telecom infrastructure, printers, professional video cameras, enterprise and cinema projectors, LED video walls, NIC cards, rack servers, and ultrasound scanners.

Diodes Inc. PI90LV02, SOTiny^™ LVDS High-Speed Differential Line Receiver

This part receives LVDS signals with rail-to-rail voltage of at least 600mV peak-to-peak operating on a 3.3V rail. Switching on 100mV thresholds the part outputs low-voltage TTL and is tolerant up to 5V TTL output node. It comes in a 5-pin SOT23 package.

The PI90LV02 and PI90LVT02 are single differential line receivers that use low-voltage differential signaling (LVDS) to support data rates up to 400 Mbps. These products are designed for applications requiring high-speed, low-power consumption, low-noise generation, and a small package. A differential input signal (350mV) is translated by the device to a 3.3V CMOS output level. The PI90LVT02 integrates the terminating resistor while the PI90LV02 requires an external resistor.

Found on page 1 of Pericom^® PI90LV02/PI90LVT02 SOTiny^™ LVDS High-Speed Differential Line Receiver datasheet

This is a low-profile part that meets the requirements of ANSI TIA/EIA-644-1995 Standard. Able to exceed ESD levels of 10kV and with open-circuit failsafe, this part is suitable for use in point-to-point and multi-drop baseband data transmissions over impedance media of approximately 100Ω. The transmission media can be printed circuit board traces, backplanes, or cables.

Maxim Integrated MAX9150, Low-Jitter, 10-Port LVDS Repeater

This part accepts an LVDS signal and repeats it on up to 10 LVDS differential pairs driving 400Mbps data rate. There is less than 100ps skew between channels and the pairs conform to the EIA/TIA-644 LVDS Standard. It runs from a single 3.3V supply and incorporates 60µA shutdown supply current. There is an evaluation kit available, the MAX9150EVKIT, supplying output sampling through SMA or category-5 twisted-pair connectors.

The MAX9150 low-jitter, 10-port, low-voltage differential signaling (LVDS) repeater is designed for applications that require high-speed data or clock distribution while minimizing power, space, and noise. The device accepts a single LVDS input and repeats the signal at 10 LVDS outputs. Each differential output drives a total of 50Ω, allowing point-to-point distribution of signals on transmission lines with 100Ω terminators on each end. Ultra-low 120ps (max) peak-to-peak jitter (deterministic and random) ensures reliable communication in high-speed links that are highly sensitive to timing error, especially those incorporating clock-and-data recovery, or serializers and deserializers. The high-speed switching performance guarantees 400Mbps data rate and less than 100ps skew between channels while operating from a single +3.3V supply.

Found on page 8 of Maxim Low-Jitter, 10-Port LVDS Repeater datasheet

With 10 LVDS output pairs supported in a 28-pin TSSOP package, this part is suitable for use in cellular phone base stations, in add/drop muxes, in digital crossconnects, in network switches and routers, in backplane interconnects, and in clock distribution.

Whatever your need for LVDS low power and high speed in your video, or other data, streaming designs, our website has the parts. We source from most parts databases and we include similar parts pages to help you find the perfect component for your application. Once selected, take a look at the CAD models available for import into your PCB layout software.

Stay up-to-date with our latest articles by signing up for our newsletter.