Altium Academy Virtual Sessions: Tech Track - DDR and BGA Routing and Fanout
This tech track will discuss DDR and BGA Routing Best Practices and addresses the challenges to the designer and illustrates the various options for BGA fanout and the balanced routing constraints needed for fanning out to DDR memories.
Risk Vs. Reward During the recent IPC APEX expo, there was a lot of discussion about SAP, or semi-additive PCB processes. As with any new technology in PCB manufacturing, there were people that are excited to jump right in and start designing with much finer feature sizes and work through the inevitable changes to the traditional thought process. Others are in a let’s wait and see mode and of course there are a few skeptics there as well. There were a few stand Read Article
SAP (Semi-Additive Process) PCB Design with Flexible Circuits Now, with the adoption of Semi-Additive Process (SAP), PCBs with much finer lines and spaces are possible on flexible materials for space and weight improvements. Tara Dunn will show some ways on how this can be leveraged as an additional advantage for a SAP PCB design. Read Article