Altium Academy Virtual Sessions: Tech Track - DDR and BGA Routing and Fanout
This tech track will discuss DDR and BGA Routing Best Practices and addresses the challenges to the designer and illustrates the various options for BGA fanout and the balanced routing constraints needed for fanning out to DDR memories.
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New Dimensions of PCB Simulation Judy Warner: What was the technology impetus behind forming Avishtech as a company? Keshav Amla: The simple answer is that we saw some major pain points in the existing electronics design and development approach, relating to signal integrity, manufacturability and reliability of PCBs. As far as signal integrity, loss modeling was a source of major consternation, but an even bigger cause for concern was the inability to predict manufacturability Read Article