Altium Designer Best Practices (Teil 1) – AltiumLive 2022

Charley Yap
|  Erstellt: February 3, 2022  |  Aktualisiert am: July 18, 2022

Wir besprechen, welche Vorteile es hat, wenn Sie Ihr Schaltplandesign in einer hierarchischen Top-Down- oder Bottom-Up-Struktur organisieren. Zudem schauen wir uns die Auswirkungen von Schaltplanrichtlinien und Leiterplattenplanung auf Ihr Leiterplattenlayout an. Darüber hinaus besprechen wir, welche Gefahren bestehen, wenn Sie Klassen in der Leiterplatte statt im Schaltplan erstellen.

Highlights:

  • Praktische Tricks für Altium
  • Verwendung von Schaltplanrichtlinien im Altium-Design
  • Was ist ein hierarchisches Design?
  • Verschiedene Möglichkeiten zur Einrichtung von Regeln zu Beginn des Designprozesses
  • Nutzen der Raumfunktion in Altium

Weitere Ressourcen:

Transkript:

Charley Yap:
Hi, my name is Charley Yap. I'm one of the sales application engineer here in Altium. Today, I'll be actually discussing a couple things about Altium designers best practices. More specifically, using the schematic to provide design intent with net classes, rules, and impact on PCB layout of schematic directives and PCB planning. This is to ensure and also identify the hazards of class creation in PCB instead of schematics, because a lot of companies, they tend to hire contractors to do the layout for them, but sometimes they also struggle with communication due to the lack of the schematic designer conveying the message on how rules and constraint are defined in PCB. Also, many larger companies, there's a discrete group that performs layout that is independent of the design groups, and that communication is a significant factor within the same organization's independent group.

We're going to actually probably discuss the agenda as well as know the bare minimum requirements on how to get things done in Altium, and maybe later on be dangerous enough to be proficient in using the tool. The first thing we're going to discuss is probably just agenda. Why define rules in a schematic? Then followed by the hierarchical or flat design. This is actually one of the most classic question. Like some companies would say, yeah, they prefer using the flat, and some companies, they are very strict about using hierarchical design. We'll actually talk about this, because this is actually one of the most important stepping stone in order for you to use directives later on. If you actually decided to go for the hierarchical design, what is it? The top-down method or the bottom-up. We're not going to try to spend much time in the top-down and bottom-up, because this is one of the most straightforward, classical steps in design, right?

We're going to discuss the multiple ways in creating design rules in Altium. We'll try to revisit stuff from the PCB and maybe learn a thing or two about some of the functionalities that a lot of people don't use. Then finally, we'll teach you how to use the schematic directives in Altium design. All right? 

So without further ado here, let's proceed with our first topic, which is why define rules and schematic? When you're defining rules in the schematic, so for example, I'm just going to grab a random project here. This is a project where it contains a bunch of different nets here. If you're trying to define or create a rule in the PCB, without looking at the schematic, it's almost assuming that you already know every single net coming in and coming out of this part. This part has a lot of components. Imagine maybe around more than 50 pins here. You want to make sure that every single net coming out from bank two is being assigned in a net class also covered in a specific rule in the PCB. Right? So rather than memorizing HB5, 8, 7, 10, 9, and 12, then jump into the PCB here. Besides going to the PCB, you first have to define this to a net class. You have to define each of the net that should be belonging to that group, and then assign that group later on. It's really hard.

There's also a very common method where a company will hire a layout designer. However, this layout designer might not... They're basically an artist of the circuit or the PCB. They might not have a very strong background on, let's say, RF design where certain components or certain nets should comply on certain spacing, or you need to actually apply certain rules on the internal power planes and so long. So it is actually better, because the schematic designer, they're the brains of the operation. They want to convey the message that, hey, I already know that these specific, let's say if there's going to be a high impedance nets, and I know the nets here in a schematic based on my design, I can just assign this later on with the directives and push it to the PCB, rather than telling the layout artists which net needs to be part of what rule. Okay?

All right, so now we're going to discuss what is a hierarchical design, and what is a flat design? So hierarchical design means that you normally have a top-level sheet, and you have this sub-schematics that falls underneath it. Ideally, these top-level sheet are represented by what they call a sheet symbol. These sheet symbol represent a specific schematic document. It's almost like a subway map. When you look at a schematic page here, and this is being represented by one, two, three, four sub-schematic. So when you look at the left side here, one, two, three, four, we have four sub-schematics here. You can easily just say, "I want to go to the FPGA here." So if I hold a control and then double left mouse click, I should be able to access the page here if you want to jump back or maybe just look at where the specific net equals by, you can trace back by holding the control and double click again, and it will go to the top level, telling you that this is the port that originated from that FPG.

It's connected to this net here. So if you were trying to connect to Heather, it pretty much just tells you where this is being connected from, one place to another. I find this method very efficient, especially if you're the brains of the operation here. Let's say you are the architect of the design here, and you want to assign certain blocks, because some of your colleagues specialize on specific aspect of design. So let's say one is a power engineer, and one is more on the FPGA expert, and some of them will be the digital designer here. So you can create blocks and save the blocks here as an empty shell and let them build their design from there. Or if they want to create more sub-levels, like a sub-schematic within a sub-schematic and a sub-schematic, the world is your oyster. That is actually the beauty about a hierarchical design.

Compared to the flat design here, if your design is basic, not really basic, but I would say not so complicated where you have to involve several different aspect of the too or the schematic design, then a flat design would suffice your needs. So in this example here, this flat design has one page for this ginormous connector, right? On the next page here, maybe a bunch of different terminal resisters. Not really a big deal, and the memory ICs, and more memory ICs, and then the power decoupling, right? So this one does not really demand a very complex map of the whole entire design. This is actually you can easily just use this as flat, right?

So Altium normally has the auto identifier, whether the design has to be a hierarchical or a flat design. So that's being set here in the net identifier scope. By default, it's always set to automatic. What that means is if a user places a port in a design, it's assuming that this is going to be a flat design but the moment you introduce a sheet symbol in a design, this automatically translate the design to a hierarchical design. So that's the purpose of the automatic. Or if you really want to be strict here where I know, let's say, I'm the kind of engineer that loves to cut corners in the company, because I don't want to follow the hierarchical design, you can actually set this in place to become a hierarchical design where a sheet entry must be present in order for the compiler to report properly, right? Another variant of the hierarchical design is what they call the strict hierarchical design where the power ports are local while the other hierarchical is the are global, which it actually exists in many ways.

So now we actually discussed the difference in the hierarchical design and the flat design. Let's talk more about the hierarchical design, because there's at least two different style in how to approach a hierarchical design. The first one is what we called a top-down. The top-down method is a natural way to approach a complex design task, because the human imagination can be as vast as the ocean. We can have so many different ideas, but the human mind can only handle a limited number of concepts at one given time. We're not built like a multi-processor CPU where we can think and do multiple tasks all at the same time. Right? Sometimes we have to focus on one aspect of the design here and go along with that, right?

So imagine you are the architect of the design and you want to define the work based on what area of focus each page should be. That's the purpose of this top-level design. That being said, when a user wants to perform the top-down approach, in this example here, I just place some sheet symbol, because I think a LCD, a power, and a config file should be in place. Let's try to add another one. This is where my FPGA is going to go. Place this box here, and I'll name this as the FPGA. All right. If you want to create sub-level schematic sheets here, you can. Let's say you have a general idea, you have not defined the entire port that's coming out of the design.

We're going to just put maybe... Okay, so I put the input here, and for here, I'll put output. If you're dealing with digital design, the IO type is very important. So your output should be an output port and input sheet entry should be an input port. So once you're done with this, what we can do is right click on the sheet symbol and go to the sheet symbol action, and we can create a sheet based on the schematic sheet symbol. So now that's where the new file name will be generated with the ports that's already provided for this user here. So let's have I'm going to assign to person A. Person A, you are going to be in charge of performing this task.

Now let's say I'm going to copy a file here. I'll copy this FPGA. Maybe just the component itself, and let's just say I slap this component here for now. It's a little bit too small, so let's try to increase the size of my workspace here. Let's use maybe size B. Size B will be large enough for us to fit this large one.

All right. Now maybe this is the perfect chance for us to learn a couple of neat tricks in Altium. Suppose you just placed this FPGA here, and your goal here is to create a bunch of wires with ports, right? So you can actually transfer the information back to the top level. What I normally do here is I just intentionally create a duplicate copy of this component. Okay. After creating a duplicate copy here, there is an option here that you can change the part and convert the part into a sheet symbol.

Now a lot of people might argue, "Why do you not convert it to a port? I think port is a lot easier to do this. So this net here will just automatically get transferred to a port." The problem with that is let's say this pin here is an input pin. When you convert this into a port, this port here, instead of an input port, it became an output. In other words, it was the reverse of the direction. So that might not be the case. So if your goal here is to ensure that if it's an input pin, you want it to be a input port. You will convert this into a sheet symbol instead. Okay? Now technically, you can just place the component on the top-level schematic, and then convert that component into a sheet symbol. Your goal here is this specific sheet is dedicated to that component. This component here should have all the ports necessary.

In this example here, I'm going to show you another technique, which is, in my opinion, one of my most favorite approach in schematic. If you know how to do this, in my opinion, this is like the 80% knowledge of the entirety of the schematic experience in Altium. Right? So what I'm going to do here is I will just select the sheet entries on the right side of this design, right? Which is this portion here. I'll perform a copy. Instead of your traditional paste, I'll use the smart paste. Okay? The smart paste is one of Altium's, I would say, most useful tool where you can invert a single object into something else or more than the original, right?

So this is the sheet entries here, and my goal is to convert the names of the sheet entries plus the direction of the sheet entries to parts, wires, and net label. So by doing so, I should be able to place this directly, and don't mind the mess here right now, but let me just try to place this as accurate as possible and delete this sheet symbol. I think plus let me move some of the nets here to make it cleaner. There we go. So that's how easy it is to just create a duplicate copy of the component, convert the component to a sheet symbol, and you select the sheet entries on one side of the component and convert them to wires, net labels, and ports, right?

I'm going to save this and call this SFPG. Then from here, you notice that the information is from the original. It's just input and output. Now there's a way in Altium where you can just synchronize the entries or the ports that exist here in FPG. The first thing that we need to do is we need to tell the sheet symbol that this sheet symbol represents the FPGA schematic document. After that, we should be able to use the synchronized sheet entries and port, and Altium should be able to tell you that, hey, these are the ports that exist in the schematic document. However, this is the one that exists on your top-level sheet. Would you like to synchronize them? Yeah, we want to add the sheets, entries, and ports here, like so. We'll just put it on the right side for now, even though it's already congested. Okay. This one should not be there, because we're not using input and output sheet entries anymore, so we'll just delete that. That pretty much completes the top-level approach.

Now let's move to the next part, which is the bottom-up approach. That being said, that the top level here. So let me just delete this. The top level normally starts empty or blank. So let's take this file first. Let's say in this example, we have a USB 3.0 device. I can actually use the same exact technique where we're going to use ports, wires, and net label. Whoops. Oh yeah. So I need to copy the component first, and from the component, we'll convert this into... Since there's no input or output pins here, I think it's safe for us to just convert this to a port, which is fine. Then I will perform the smart paste, because now I'm copying port, and I would like to convert this into ports, wire, and a label. Okay?

So once we're done with the bottom level, we're going to the top, and from the top, we can just perform the sheet action, and our place, we're going to put the... Oh sorry. I can just go to the sheet symbol here. Create sheet symbol from a sheet. We're going to use the USB 3.0 schematic document here, and you are done. Right? This is actually very ideal. If you know that every single port is going to be connected to, let's say, different blocks. So let's say you have four different blocks here on the sheet symbols. So let's say one, two, three, and then four. Each of those sheet entries are going to its respective place.

However, if you want to just connect this USB 3.0 to, let's say, a single page here, there's a way for you to save space by combining all of these ports here into a single port, and that's what we called a harness or signal harness, because the USB 3.0 is usually going to a specific page, and this aren't normally grouped up. So instead of using ports here, what I'm going to do is use the harness connector here like so. All right? The next thing here is I want to use the smart paste to smart paste the nets, and I would like to convert them to harness entries. Okay. Now all of these different nets will be condensed down. We'll call this the USB 3.0. Now place the port. So we'll just connect it here to the tip, and voilà.

In my opinion, the signal harness is very useful, because you cannot just use normal ports if you're using different nets of different net names. But if it's a bus, let's say LED1 all the way to LED32, they have the same exact name, but the only thing different here is the number, the variable for each of the net. If it's a bus net, then you can just use normal ports, but if you want to combine nets of different names, or you can also even combine signal harness to a signal harness, and that's where the signal harness becomes very useful. Okay?

So what I'm going to do here is I know that I'm using the signal harness from the bottom level. So we're going to synchronize this, because it knows that we're using this USB 3.0 signal harness. Once we place it here, and you notice that the port is colored blue, indicating to you that this is a signal harness, then you are good to go. That's one of the most important basic fundamentals in schematic. Right? Now we finally revisited all the most important parts in our experience here. We are now moving forward to the PCB or the design rule.

So a little bit more for our refresher here, what are design rules? Design rules target specific object and are applied in a hierarchical fashion. So for example, there is a clearance rule for the entire board. Okay? Then perhaps a clearance rule for a class of nets. Then perhaps another for one in passing the class. Using rule priority and the scope, the PCB editor and the PCB section can determine which rule applies to each object in the design. If a user has a well-defined set of design rules, you can successfully complete the board design with varying and often stringent design requirements.

Additionally, since the PCB editor is rules-driven, taking time to set up the rules at the beginning of the design will enable you to effectively get on with the job, the design, safe in the knowledge that the rule system is working hard to ensure that success. So normally, sometimes people get too excited jumping into the PCB, and later on when they find out, "Oh, I shouldn't be using this type of width on this net, there's no way for you to... There's a way for you to expand the net, but that will generate a bunch of violation, and you don't want that. You always want to set the rules first before laying anything in the PCB. That is always the rule of thumb in any PCB design.

So a couple things. Let's try to revisit what are the different ways in creating rules in Altium? So number one, let's try to open a different project. I will open my favorite, which is my reference design, the Bluetooth Sentinel. All right. This PCB file. So the first and the most direct way in defining design rules in Altium is to go to the PCB here and access the design rules. I'm sure that if you guys have any experience with the PCB here, this is like the first thing that a lot of people go.

Just go to the clearance rule, for example, and always remember to always have the all all rule, or catch all rule at the very end, because if you just have no all rule at the very bottom of the priority list, it assumes that you are fine to not have any clearance rule set in place in the design. Right? You don't want that. You always want to have a buffer to catch every uncategorized rule or undefined rule to fall into a category. So we're not going to talk much here, because this is already a fundamental or a essential topic that you should know when you're dealing with design.

Next one here is, and a lot of people don't use this, because they're not aware that you can combine the PCB filter. This is what we called the try before you apply kind of rule. Because in the design rule, it just assumes that you already know what specific group, objects, entity that you want to apply. But here, this is a good way to create a query first. Once you define the query, you will be able to display a preview of what you're trying to look for. If this is good, then you can begin creating the rule based on what was filtered here. Okay? So there's multiple ways. I'm going to show you for the most, I would say, the easiest way if you're a beginner and you have absolutely no idea what query language are, this is like turning the English language into a computer language. That's through the find similar object, right?

So the find similar object, it's a menu where it's going to tell you, "All right, what are you trying to look for?" By default, it will set this to same on the object that you right click first. It will give you all the properties of that object. So in this example, we have a track. What are you looking for? A track that exists on mid layer two. Sure, I want to set that up. If you want to target a very specific net, then set this to same. But for now, I just want to target every single traces that exist in mid layer two.

Another thing here is I would like to mask the result and only traces that mid layer two will only be displayed while the rest will be masked out. Another important recipe here, and by default, when you install Altium, this is always set to disable. Enable this create expression here, because this will populate the computer language in the filter once you're done with the found similar objects. So we're ready to run this through. We'll just hit okay, and that selected every single track that exists in mid layer two. Okay. It's like, "Oh, this is the result. I like this result here. Based on the result, I would like to now move forward by applying a set of rules."

So we can just click the rule here, and Altium's going to ask you, "What type of rule are you going to set this in place?" I would like to perform a width constraint. Okay. This width constraint here is like, "Okay, what values of track do you want this to be?" Let's say everything here has to be .15. I think when I apply this .15 to each of these min, preferred, and max, it should result a violation, because I'm pretty sure that the width here is... right. So when you actually apply this... You know what? Let me double check. This is .1. Okay. So if I try to run the design rule check here, I should be receiving... Yeah, there's a bunch of width constraint telling you... Okay, let's try to understand what's being reported here.

There's a width constraint violation, or I always like to use this menu here called the PCB rules and violation. In my opinion, this should be the bread and butter for any... Whether you're the schematic designer or the PCB designer, if you have just a schematic-only version of Altium, you can still run the PCB rules and violation to check any error that occurs in the design. So I know that I should have some width constraint violation, because if I double click this, this menu will appear and it tells you what the violation is.

First of all, the rule that's being violated, it's called the width_1. I can be more creative here by saying width mid-layer two, because the min, max, and the preferred is .15 on all categories. However, the value here, the actual width is currently .1. I create an absolute range or absolute value. It has to be 1.5, otherwise throw an error. That's what happened here. So you can see how easy it is to just see the PCB filter in order for you to apply the rules. It is a pretty good way to use this as an exercise, because later on, once we revisit to the schematic, it kind of wants you to have a basic idea or knowledge of the PCB rules and how it works.

All right. Now the find similar object is the very first, I would say the easiest level of understanding rules. The next one is called the helper. So this is like the encyclopedia for every single command that occurs or that you can tag in here in the filter. So if you use that back drill bottom, there's a description here. It tells you what each of this query command would do. This is more for advanced user. Now for beginners who are trying to train themself, be more proficient in this filter here other than the find similar object, you want to use the builder. The builder is build your English sentence, and it will convert into a computer query preview.

So what the condition there is you just apply a condition. Let's say it belongs to a net. When you to the net, it will display to you every single net that exists in the design. So let's say I wanted to use ground for now. Now you can add another condition here. What other condition would you like? I want the object to be let's say only vias. You have experience with the Jill design, there's the logic and and or. In this example here, the net has to be a ground, and it must be a via. The query language will automatically convert this in net ground and as via.

So once you're done with that, you can even apply this, and you notice that everything will be grayed out. I was like, "Oh, this is the preview of my query here," and if you are happy with this approach, and you can now create the rule like so, just like the previous example that I'd just shown. Okay? Very good. Now we are actually done with this approach here. Now's the time for us to apply what we've learned so far through the schematic. So this is where I'm going to change hats. Instead of being the layout designer here, I am now the electrical engineer that is in charge of the schematic design. I would like to push this information to my layout engineer without fiddling around with the PCB file. You want to provide this information the moment the layout engineer imports all your schematic designs to the PCB, the rules are already been set in place for them.

So the first thing that you have to do here is go to the project option, and you always want to look at the class generation here. This is one of the few things that a lot of people neglect or don't understand what this class generator is all about. By default, Altium will automatically create component class. These are component being grouped together based from the origin of the schematic document that they were used on. Another thing is this generate rooms, we'll talk about this generate rooms. Usually rooms, for beginners, are the bane of every layout engineer's existence. But I think this is one of the few misunderstood powerful feature in Altium. All right? So we'll definitely jump back to the rooms later on, but I just want you to understand the component classes here.

It says here we will generate some net classes if a bus is present in the schematic, and most of this are bus section, signal harness. Some people would prefer signal harness. Let's remember the USB 3.0. If we want to apply that, then you can create those net class, or generate net class for components. Whichever you want. But the goal here for now is I just want to generate net class based on a feature called directives in Altium. Right? Another thing here is to make sure to go to the comparator tab and double check if the difference associated nets sometimes are by default, all of these are enabled, but in this design here, whoever the user was, they disabled the comparison of the nets in the schematic and for the PCB. So make sure that all of those nets are enabled, otherwise, this method will not work.

So my goal here is I want this nets, starting from DQ probably zero, DMZ, all the way to DQ, whatever this highlighted area here. I want these to be grouped as a specific net class, and there's multiple ways to do this. We're going to use the directives here called the primary set, select lollipop, and what I'm going to do here is call this label let's say the DQ first batch. That's the name or the label I'm going to put. Next thing is I'm going to put a net class, and I'll just say DQ1. That's the name of my net class. So anything that I place this lollipop or this directive, this will apply or group them up in a net class called DQ first batch. All right. So I'll just apply this real quick. I'll just apply this for now, the right side.

So once I'm done with the right side here, and everything looks good, I can update the PCB here by pushing that information. Now it'll tell you that, "Hey, we're about to add these net class here." So right now, only DQ1 is the one that I really care about. Remember in the project option, I did not uncheck the net class or the... Yeah, the net class for the pages, right? For now, I'll just uncheck that and just say I would just want to push the DQ1. I'll execute that changes, and when you're here in the PCB, when you visit the net class DQ1, it involves DM0, double zero, 02, 04, and 06. So if we actually look at the right side here, DM0, double 0, 02, 04, and 06.

So this method here is very useful if the nets are scattered all around and you want to ensure that they should be part of one net class. But another easier way to do this is you can actually use what they call the blanket. The blanket will cover... Anything that it touches will be part of this net class group. So what I'm going to do here is maybe copy this directive again and attach it here. So whatever the tip of this directive touches and this blanket here covers all of these nets, these nets will now be part of the DQ1 net class.

The cool thing about this blanket here is you can enable it or disable it on the fly. So let's say you don't want the net class to be pushed. You can just click here. But if you want to enable it, just click it here. Next time we update the PCB, this will tell you that, hey, we're about to add this new net to our net class, to DQ1. Again, I'll still don't want to include the sheet one to sheet number five. When you're happy with that, we'll execute the changes. So if we try to revisit the classes here, classes should be able to distinguish DM0, and then a bunch of DQ from double 0 all the way to 07, even the differential here. So that is creating net class. You can also create a component class if you want, if that group of components should belong to a specific component class.

Now the next part here is now we know how to create this net class. The next thing here is can we apply rules to this following nets from DQ double 0 all the way to DQ07? That's the value of using this directive here. You can actually apply multiple different commands other than just net class. You can go here and apply a PCB rule. So that's the reason why I have to probably discuss design rule first as a refresher course. Now you should be able to see, "Oh yeah, it started to make sense, because I tested the query earlier, and using the PCB filter, it looks great." Now I would like to apply width constraint to these group of nets. I would like to say these nets should have a five mil. So this one works great, but I think if you edit this, you might have to edit... Yeah, you have to edit the rest of the directives here as well.

So the easiest way to do this is just delete them, and then paste the newly updated directives like so. That's why there's a huge advantage using blanket, because you don't have to individually place this directive to each of this net, but rather as long as it's currently highlighted, then you should be able to apply this rule. So let's test it. We're going to go to the update PCB, and everything is done by the schematic designer. You can see that there's a rule added to this width constraint in net class DQ1. Okay?

You actually go here, and let's say I'll just grab a random pad or place a random pad. Then I will set the net here to DQ double 0, which is part of the net class. If we try to route this net here, bottom, if we confirm this... Let's change it to a Q, which is in mils, this is now five mil, which is the rule that was applied from the schematic. Okay? So hopefully everyone understands the importance and technique in defining rules in a schematic.

One bonus topic here that I would like to discuss is the room definition. Like I said, rooms are one of the few things that a lot of people neglect in Altium, but it is actually one of the few misunderstood feature, yeah, powerful feature in existence. So suppose that... I'm going to grab a different board here. So in this board, I will try to remove. Okay. I'll set all layers here. Then let's go to the top layer. First thing I'm going to do here is place a room. Don't know why I can't place a room here, but let's try a different page. Shell the polygon, go to the top layer. Go to design, place a room. All right. So we have a room here called... Let's just say we're planning to put a BGA in this room here.

The next thing is I would like anything within the BGA room to have a special rule here. So I just created this rule. This area can now be a area-specific defined design rule. I would like to create a rule here. Let's delete this one for now, because our general rule for all the traces is currently let's just say .5 mils or .1 on the width and maximum of .5, but if we have a trace that goes within the inside perimeter of this room here, let's do a custom create within room. BGA. I want the trace to automatically get converted to one millimeter, a big fat trace. While the rest of the trace outside the room will be between .1 to .5 millimeter.

So let's try to place this interactive routing here. We start out trace here, and let's try to confirm. It's currently .1. As we approach this area here, notice that it will automatically change the moment it passes through the room. Right? This application is really powerful if you're doing it with BGA. It's almost like if you have to force a net down from a 10 mil to a 5 mil trace, just place your room here, and everything will follow through. Okay? That is it for the room plus the idea of defining design rules from the schematic and being pushed through the PCB. Again, my name is Charley Yap, and I really appreciate everyone's time. Thank you for attending Altium Live 2022. Until then, bye.

Über den Autor / über die Autorin

Über den Autor / über die Autorin

Charley arbeitet derzeit als Field Application Engineer bei Altium und ist verantwortlich für die technische Unterstützung der Corporate Strategic Account Manager, Sales Manager, Reseller und Anwendungsingenieure. Außerdem ist er für den Aufbau und das Management technischer Beziehungen zu Kunden, Partnern und Branchenführern zuständig. Charley schloss sein Studium an der University of California in San Diego mit dem Schwerpunkt Elektrotechnik ab, wobei er sich auf Energietechnik spezialisierte. Er konzentriert sich jedoch seit 7 Jahren auf die EDA-Industrie.

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