KEYNOTE: Gängige Leiterplatten-Layoutfehler, die zu Compliance-Problemen mit EMV führen – AltiumLive 2022

EMV-Compliance hängt in der Regel von einem guten Leiterplattenlayout ab. Bei einem guten Leiterplattenlayout kommt es vor allem darauf an, potenzielle Problembereiche zu erkennen und unerwünschte Kopplungswege unter Kontrolle zu halten. Etwa die Hälfte aller in kommerziellen Prüflabors getesteten Produkte erfüllt bereits beim ersten Versuch alle Anforderungen an die elektromagnetische Verträglichkeit.

Viele Unternehmen entwerfen ihre Produkte konsequent so, dass sie den Vorschriften entsprechen, während andere immer wieder Produkte ins Labor bringen, die ganz offensichtliche Designfehler aufweisen. In dieser Präsentation sprechen wir über typische Fehler im Leiterplattenlayout, die häufig zu Problemen bei EMV-Tests führen. Viele solche Fehler entstehen, wenn sich Designer zu sehr auf unwichtige Details konzentrieren und dabei die Hauptursachen elektromagnetischer Interferenz vernachlässigen. Andere Fehler entstehen durch schlechte Designratschläge aus verschiedenen Quellen. Der Schlüssel zu einem guten Leiterplattenlayout für EMV liegt darin, sich auf die wirklich wichtigen Aspekte zu konzentrieren, um die Compliance mit EMV-Anforderungen zu gewährleisten.

Keynote-Highlights:

• Isolierte Massen oder unsachgemäße Erdung sind meines Erachtens die häufigsten Fehler beim Layout.
• Warum Rückströme und Masse wichtig sind
• Herstellen von Verbindungsrahmen
• Die korrekte Erdung, Filterung und Bandbreitenkontrolle ist für alle EMV-Tests sehr wichtig
• Vorsichtsmaßnahmen zur Einhaltung der EMV-Designrichtlinien

Zusätzliche Ressourcen:

• Vernetzen Sie sich mit Todd Hubing auf LinkedIn
• Vier weitverbreitete Mythen über das EMV-Design

Transkript

Lawrence:

Dr. Todd Hubing is a professor Emeritus of electrical and computer engineering at Clemson University and president of LearnEMC. Dr. Hubing holds a BSEE degree from MIT, an MSEE degree from Purdue University and a PhD from North Carolina State University. He was an engineer at IBM for seven years, and a faculty member at the University of Missouri-Rolla for 17 years before joining Clemson University in 2006. He established the Clemson Vehicular Electronics Laboratory where he supervised research projects and taught classes in vehicle electronics, electromagnetic compatibility, and digital signal integrity.

At learnEMC, he provides EMC instruction, consulting, and design assistance to engineers working in the electronics industry. He is a fellow of the Institute of electrical and electronics engineers (IEEE), a fellow of the applied computational electromagnetic society and a past president of the IEEE electromagnetic compatibility society.

Please welcome, Todd Hubing.

Todd Hubing:

Oh, hello. Yes. Thank you, Lawrence. Yes, I'm Todd Hubing. I'm going to be talking about common print circuit boards that can cause EMC failures, electromagnetic compatibility failures. When I was putting together this presentation, I looked at boards that I've reviewed in the past two to three years to look for, is there sort of what are the mistake people are making over and over again or that different people seem to make with their boards that cause them to have an EMC problem.

I'm going to share my screen hopefully here. So I work with a variety of different industries and EMC can mean different things, depending on which industry you happen to be working in. These are pretty much the six main electromagnetic compatibility requirements or tests that people usually need to comply with. Not everybody needs to comply with all six of these, and depending on which industry you're in there may be different tasks that tend to be the biggest challenge for you quite often in consumer electronics or computer equipment, information technology equipment, electrostatic discharge, or radiated emissions tends to be one of the two of the bigger more difficult test to comply with.

Whereas if you're working with industrial controls or large equipment, robotics equipment, radiated immunity and transient immunity can actually be the more challenging test to comply with. So different people will have different experiences going into the electromagnetic compatibility test lab. But at the bottom, I point out something I say, designing a product that is guaranteed to meet all of these requirements is relatively straightforward.

That might sound to many of you like a pretty bold statement, but actually a lot of companies, a growing number of companies designed to comply with the EMC requirements so that when they go in and do the test, they know that they should pass. The test is really a verification test, just to be sure that they've got everything right. Whereas with other companies that I have worked with in the past, they largely design it to work and then they take it into the EMC lab and then they start thinking about what they need to do to be compliant with the EMC requirements. And that generally is not a very good approach because if you do that, your options for fixing your product and meeting the requirements become very limited, they become more costly and your schedule's going to slip.

But in consumer electronics, if you're designing something like the next smartphone, you really can't afford to build the product and then test it and then have to go back and redesign it. Slipping your schedule by months can mean the difference between a profitable product and unprofitable product in many industries actually.

And so for are many industries, failing EMC really is not an option, they need to design it to comply. And that can be done. On this slide I'm listing some of the key things, I call them key design considerations that you need to be thinking of in order to guarantee compliance with each of these different requirements. And you'll see a lot of things keep recurring from one requirement to the other. Grounding is certainly an issue or something that's important for all of these test.

Proper grounding, filtering, or bandwidth control are also very important for all of the tests. But today we can't really talk about everything so we're going to talk about six common mistakes that people will make with their layouts that tend to be independent of the industry that you happen to be building your boards for these are reoccurring relatively common mistakes. I want to point out the boards that I'm working with are usually designed by people who are pretty good at EMC already. Most companies I work with have an EMC group of their own or they've got designers who are very experienced in working with EMC and meeting EMC requirements. So I don't see many of the rookie mistakes.

Yesterday Dr. Bogatin gave an excellent talk talking about, you need to pay attention to where your currents flow, how they return, ground bounce, things like that. Generally, the people that I'm working with have done that. They have a basic knowledge of EMC, so these are mistakes that are more likely to happen apparently because I'm seeing them there. If you have some experience, you've got all the basic things, right? You've put some thought into how your currents are flowing, but anyway, listed here, I've kind of in the order of how common they are when I see them.

Isolated grounds or improper grounding, I would say is the number one layout mistake people are making. Bypassing, inadvertently bypassing the filter. Laying out power converters in just ... A well laid out power converter basically should never cause an EMC problem. And if it is causing an EMC problem, it's generally because people have just laid it out in a pretty bad way. Inappropriate power bus decoupling. Putting large and small ceramic capacitors in parallel with each other and inappropriate use of common-mode chokes.

So those are the six design mistakes that we're going to focus on today. So let's start out talking about isolated grounds. About 25 years ago when I was on the faculty at the University of Missouri-Rolla, and we had four faculty members at that time who were all EMC faculty. And we were looking at layout of a board. It was an aerospace company. It was a single board that was part of a system, but a fairly complex board. I think it had 10 layers complex for the time anyway. And this was back before we had these nice computer board layout tools and viewers, and so we actually had schematics printed on large sheets of paper. And we were in a conference room with all of these schematics spread out everywhere and we had the board layouts where files were on transparent sheets, photographic sheets that you had to overlay manually to see how things lined up.

Anyway, we were working on a product and they had something called a frame ground. They basically had a symbol that looked like that, but then they also had symbols that looked like this, and they had an A ground, a B ground, a C ground, a D ground, their board had five different grounds. And we were working on it, we had been working on it quite a while, but professor Tom [Vandora 00:09:12] and who was basically one of my career mentors and just a fantastic EMC educator, very practical guy. But he said, whenever I see more than one of these symbols on this schematic, I know there is work for us here. And at the time I thought, well, it kind of made sense a little bit, but over the years, I've begun to realize just exactly how true that is. Really most designs should only have one ground symbol on them, not more than one.

If you have more than one, and if you have three, almost certainly you're doing something wrong and maybe very wrong. So I want to talk about that a little bit. First of all, one of the reasons we have so many of these symbols is because there's a little bit of confusion about what ground is and that's because we label different things ground. So we have safety ground. We ground products for safety reasons all the time we have anything to do with electromagnetic compatibility. That's a safety requirement, but we still label those things ground. And typically the symbol we should be using for an earth ground type situation is that symbol.

And then we do grounding for EMC. And that's basically recognizing that we have a big metal thing there in our system. And that big metal thing is half of an antenna. It is basically our zero volt reference, our local zero volt reference for all of our EMC compliance tests. And more than just the tests, when we put that out in the field, we're going to rely on that ground structure to meet these EMC requirements. But then we also label conductors that are current returning conductors ground. And that's largely where we get into the ... We have a different symbol. That's current return. If you look at the international symbols for ground, that is not actually a ground, that's a current return. This is a ground, this is a ground, and there's some other symbols for different kinds of grounds.

The current return and grounding are really not at all the same thing. They're both important things, but they're not the same thing. And one of the problems we run into is that current return is actually incompatible with grounding. In your home, you may have an outlet that has a voltage conductor, a neutral, maybe a hot, a neutral, and a ground conductor, where the potential of the hot is a voltage in the US, 110 volts say RMS. The neutral has a voltage of zero volts RMS and the ground has a voltage of zero volts, RMS. And actually the neutral and the ground wires go to the exact same place, but they're different.

And the reason they're different is for safety reasons. Current returning ground are incompatible and likewise for EMC, current returning ground are incompatible functions. So we have current return conductors and we have ground conductors, but they're not the same conductors.

One of the difficult things is that both current return and ground are very, very important concepts. And I mentioned current return, like in Dr. Bogatin's talk, actually, Rick partly gave a talk for this same conference a few years ago, labeled titled grounding and it was an excellent talk and very good advice. I'd encourage you to go back and look at it it's as relevant today as it was back then, but it was really about current return, not about grounding. He was talking about how do we get these return cards, these signal return cards back where they need to be without causing an EMC problem. And that's different from grounding. Grounding is also important, but grounding and current return are not the same thing.

Most of your products have big metal stuff and that big metal stuff is your ground structure. So I'll show satellite some consumer electronics items, aircraft, an automobile. There's a big metal thing there in every one of those products. There's something really big and metal, that's our ground structure. We don't get to redefine where our ground is. That is our zero volt reference. It's our local zero volt reference throughout the entire system. And it plays at a really important role in meeting the EMC requirements. Basically, if I don't drive any other pieces of metal that are of resonance size relative to the ground structure with about a millivolt or more of voltage at any given frequency, I'm going to be compliant with the radiated emissions tests. I want to bond everything to that ground structure that I can and if I can't, then I need to deal with that.

But the ground playing in a circuit board, that's not a ground structure. It's not part of the ground structure if we're thinking in terms of EMC, we have to separate that concept, that conductor called the ground from our ground structure. And why, because if we return currents on intentionally, we will develop a voltage across it and that voltage prevents it from being ... I mentioned a millivolt is enough to exceed a radiated admissions requirement generally. For some of you, a millivolt is way too much and like 100 microvolts could be enough to cause a radiated emissions problem. But generally on a circuit board, if we're returning tens of milli amps at tens of megahertz, we develop a voltage of a few millivolts. And the university professor and me wants to say, "Well, you can't even define that voltage much less measure it." But that doesn't matter that there is a voltage that is capable of driving things that we attach to that board there. So it's not ground, it's not a zero volt reference.

So we don't have time to talk about it. Here's everything you need to know about grounding in this talk. But I wanted to kind of boil it down to what you really need to know and what you really need to know if you're laying out the board is, there is a ground, you can't ignore it. If you're designing a circuit board, everything that leaves that circuit board that's large in metal needs to be bonded to the ground or shielded. So there are really two cases. If you design a circuit board, that's going to be located I say, above, inside, or close to the frame, the frame being your EMC ground, you can't ignore that frame. You can't isolate yourself from that frame, because if your board has a voltage, that's different from the frames voltage, that's more than a millivolt at any given radiated admissions frequency, you're going to fail radiated admissions. The best way to prevent that, really the only way to prevent that if you're mounted very close to the frame is to connect to it.

And that basically means that things that leave our board. So here, I'm showing a circuit board with a connector and presumably there's a wire harness or their wires that are leaving that connector. Those wires are all potentially half of an antenna. If one of those takes on a voltage at any radiated emissions, frequency of a millivolt or more, we're going to fail radiated emissions, or we're capable of failing radiated emissions anyway. So we need to bond them all at our radiated emissions frequencies to the frame, because a frame is a zero volt reference.

We can't bond them to the frame unless we bring the frame ground onto the board. For the few products where we are forced to isolate our board ground from the frame ground, that means we need to bring a separate chassis ground onto the board. For most of your products though, if they're not working with voltages higher than 50 volts, or if they're not for medical electronics, we don't need to isolate them from the frame and we shouldn't isolate them from the frame. What we need to do is our ground on the board is going to basically become the area on the board, near the connector and everything that leaves the board is going to be bonded to that connector at high frequencies or shielded. And if it's shielded, the shield is going to be bonded to the frame.

So we need to make our connection to the ground. Where is our ground? Our ground is this area of our, say, it's our digital return plane. And I've labeled it return because I prefer in board layouts to label the round plane, a return plane, just so people don't ever get confused and think that that's ground and use apply the rules of grounding to that plane. If you label it ground, of course it doesn't change anything, but it allows for some confusion.

So where is our zero volt reference? It's this area of that plane right near the connector. And I can't run any high speed signals parallel to that because that will induce a voltage across that ground. But I can go ahead and run high speed signals, perpendicular to that area all I want, and then what I do is I filter everything that leaves on shielded gets filtered to that ground. And that ground needs to be connected to the frame, right at the connector, preferably on both sides of the connector. I need to get a low inductance connection to the frame at that point.

Basically, if you're going to build something, it's got high speed circuitry on it, and it's going to go near the frame, you need to connect to the frame. Don't think that you can get away with trying to isolate yourself because it generally doesn't work. If you really know what you're doing, and you're very careful, maybe you can take care of that through with shielding. So we're making a connection to the frame there and there, what about there and there? That's Fine. If you want to do that, I can make connections to the frame anywhere I want as long as I have them at the connector. And by the way, if I have a connector over here, which hopefully you don't because our high speed circuitry between two connectors will drive one connector relative to the other. But if I did, I would need a connection to the frame by that connector also, and I would need to filter everything there.

So what if you don't have a frame? In an automobile, there's a lot of electronics today in the rear view mirror, the side view mirrors. Electronics is sticking out away from the frame. There's no frame ground right near the circuit board. In that case, you actually are allowed to define your own zero volt reference place. Where you should define it, where you need to define it is near the interface again, because again, if I've got wires leaving the board, I want to tie them all to the same zero vote reference, which is going to be the area of the board, basically under or adjacent to the connector.

And as long as they're all tied together then I can't drive a voltage on to the wire relative to the board or onto one wire relative to another wire. And if I can't do that, I'm not going to have a radiated admissions problem. What you absolutely cannot do is anything like this, cutting up that solid return plane. If I cut up a solid return plane, and I've got components that are driving signals out of the wire harness, the signals going out, those different wires have a different ground reference. Something referenced to this ground would have a different voltage reference than something referenced to that ground.

All of it, if I do something like this, I've got the stuff referenced to the five volt ground, and I've got the stuff referenced to the 12 volt ground. If those grounds have a millivolt, the potential between them, I'm not going to meet the admissions requirement, or I may not meet the admissions requirement. The best way to avoid that is to have one solid return plane, especially under the connector, but basically it should be everywhere. Most boards I see have that today. This used to be much more of a problem. If you back up 10 years or more, we saw a lot more of these split planes people have in my experience, largely recognize, this is always a bad idea. Why do I show it? Or why do people do this? Because actually, if you look in some EMC books, all of these examples were taken from books or application notes, and you need to be very careful.

Rick Hartley is very famous for saying this, but you can't trust what you read in an app note. App notes often tell you to do exactly the wrong thing when it comes to EMC. And some of that is it's based on rules that kind of made a little bit of sense 40 years ago and have just kind of hung around and some of it that I don't know where it comes from. But anyway, there is a lot of bad advice and app notes, including these, which were all derived from current app notes and textbooks, and just don't do it.

We should always have solid, solid plans. We don't want to cut it up. And if we did cut something up, for some reason, we'd want to be very careful about it. When we see failing really bad designs, it's usually because they've cut up a return. So I don't do that. What do you do, suppose I really need to separate an analog return from a digital return. There's only one reason that you would ever really need to separate them and keep them isolated. And that's, if you had low frequency, common impedance coupling, there are very few situations where that happens. Audio circuits now being a notable exception, audio returns should not generally be shared with a digital return path because audio is low frequency.

SO we often will have to isolate an audio circuit return from a digital circuit return. But a lot of the micro controllers you can buy today will have an analog ground pin and a digital ground pin. And inside the micro controller, they're just tied together, but it leads people to believe that they should on their board have an isolated analog ground and digital ground. That's almost always unnecessary and not only unnecessary, but not advisable.

You should make sure that it's absolutely required before you start isolating returns. But if you do need to return isolate them, do it on different layers. Don't cut up one solid layer, keep your one solid, say digital return plane here. We're showing an eight layer board with two digital return planes. If you need a separate analog return, wrote it on a different layer because at low frequencies, they needed to be isolated, but at high frequencies, we're probably going to want to come back in and use capacitors especially if things leaving the board are referenced to both digital and analog, then at high frequencies, they need to be at the same potential.

And here I'm showing the case where we have an isolated chassis ground, isolated from our digital return. That's often required in military products and medical electronics, but in virtually or anything where you have unsafe voltages coming onto your board, then we have to late the chassis ground, but for most other products, we should not be isolating. Isolating the chassis ground always complicates our life if we're the EMC. If we're guaranteeing compliance with EMC requirements, we don't like to see isolated chassis grounds. We got an automotive product or a consumer electronics or computing equipment. We shouldn't be isolating the chassis ground from the digital ground.

Okay. The second item, the second most common problem. And I would say when I was looking back at the last few years of problems, almost every board I reviewed had this problem. And filtering is not a problem, people generally know how to design a good filter and largely because there are websites and tools you can use that will lead you through the process of designing particularly the main board filter where the power comes in, the power line filter coming into the board. They'll tell you what values of inductors to use and capacitors if you're going to build a pi filter.

So most boards I've seen have had a good filter. The problem was they let the noise go right by the filter. And then they had a conducted emissions problem or a radiated emissions problem, or a high frequency immunity problem like bulk current injection. So in the schematic we're showing a pi filter. We have an inductor, and we've got capacitors on both sides. By the way, if you use one of these models or formulas to calculate the value of that inductor and those capacitors, a lot of people then say, well, more capacitance will be better or more inductance will be better. And then they add additional capacitors.

You have to be careful when you do that, because now you can build a filter that has a resonant frequency. And if you happen to excite that resident frequency, you can see a big spike in your particularly conducted emissions at that frequency. So you need to be careful about modifying the good filter design that you have. But the problem I'm mostly seeing is that people will do this. They've got the filtered side here. We're calling the power side VBAT, and then they have whatever's on the other side of the filter. And when you go in, you look at the layout on the board, the VBAT and the VDD net in this case, overlap each other, maybe on several different layers. Why do they overlap? People knew they were carrying a lot of current because they were bringing the power into the board.

And so they thought I need to make them big and I need to make them wide. And that's probably true, but they shouldn't overlap because when they overlap, I can get tens or hundreds of Picofarads of capacitance in that overlapping area. And that overlapping, that capacitance basically shows up here. You might think, well, I had 50 Picofarads of capacitance and that's not that much, especially I conducted the MI frequencies, that's not that much. You might say, well, that's 500 Ohm's. The frequencies that I'm interested in, that's 500 Ohm's of impedance. That's still a lot. You can't view it that way because there are two reactive elements in parallel, they will have a resonant frequency.

You can really destroy the performance of your filter with even a little bit of capacitance. So you have to be very careful. And it's completely unnecessary. In fact, you look at that and you'd say, well, that's a pretty obvious mistake, how you said what 90% of the boards you're looking at have that mistake. How are they making that mistake? It's so obvious and really, so what should they be doing? They should have done something like this. We didn't need this over here. There are no components over here that use this. It's pretty straightforward what needs to be done. So if it's pretty straightforward, what needs to be done, why are people messing it up? And that's because, well, this is a very simple board. Most boards, I'm sure you're aware are much more complicated looking.

There's a lot to look for. And so when I'm reviewing a design, what I will do is I will go in. If you're using altium designer, color every layer a certain color like red. Every net on every layer is red. Then go in and of course, if it's ground, ground is neither on one side of the filter or the other ground is ground. So color your ground net screen, or actually color this ground net green, not all of them, if you have more than one. Then go in on the side that has the fewest nets and color those that contrast in color like yellow.

Now you go into the viewer and it's pretty easy to see by looking at the different layers, whether or not you've inadvertently bypassed your filter. And you'd be surprised at how often you'll find that, oh, down on buried in this board somewhere, I've inadvertently allowed a path for noise to get around the filter. So I've got an example of how to do this or what to look for. Of course I couldn't use any of the actual boards that I've been working on. So I went and I looked for a public domain board layout and I've got one here. There are several out there, but I just chose this one, because it's relatively straightforward.

Here's the filter. So here's where basically the input is. So I colored every net on the board red or pink. And then I made the ground, the digital ground that we're referencing here, the D, G &D green. Then I went in and I found that net made it yellow and then all these individual small nets in there basically every net on one side of that, I just colored it yellow. And for this particular design that looks like this on layer one and layer one is the layer where the components are, the filter components are. And so we can see the inductor is right there. We've got basically the quiet side of our filter there then the noisy side of our filter in pink there. And looking at that layer, you can see, we have not bypassed the filter that the people who laid out that board did a good job of keeping the noisy side stuff away from the quiet side.

The closest they come is under the inductor and they have to come. They have to get kind of close under the inductor, because they're both connected to the inductor. So that looked pretty good. This was an eight layer board. So we also need to look at layer eight, bottom side of the board. And again, we see that our noisy stuff is over here. Our quiet stuff is over here. So they're pretty well isolated from each other. And then also it was important to go through and look at all the other layers. There are six layers in between layer one and layer eight and make sure that the pink and the yellow never got too close to each other. It's okay if they overlap on layers that are isolated from each other by ground, but we can't get coupling, they can't come near each other on any of the layers and certainly we don't want them to overlap on any two layers.

And actually, that board was actually done pretty well. I didn't find any problems with it. So what I did is I made up another example that based on an actual design I had looked at that is more representative of what I typically see. And this board happened to have an isolated chassis ground. So we had two power inputs coming in here and here. But so these are colored yellow, everything on the other side of the filter is colored red and the chassis ground on this is colored green. We see a little bit of chassis ground on ... we're looking at just the top two layers here, but what we see is that on the top two layers, there's overlap here between the pink and the yellow, the quiet side and the noisy side.

And so the circuitry in here is creating noise basically that can just go right out to the LSN or right out under the wire harness and cause a problem. It doesn't have to go through the filter. And if we look for it quite often on a complex board, we find that. But if we're looking, once we look for it, it's easy to see. Once we've colored these nets, it's easy to see this mistake and so it's relatively easy to avoid.

And finally I talk about most people get the filters, right but on the other hand, this is again from a textbook where somebody is talking about how to lay out a pi filter on a board and basically the board has a ground plane, but what they've done is put a ground patch and that's sort of a crazy idea. It is we're taking all of the noisy stuff and making our noise currents get to ground by flowing over to where the quiet side currents go to ground. We're making them share the same vias.

It's kind of a crazy idea. And you think, well, why? Especially in a textbook from a reputable source, why would they even suggest something like that? And basically that's, again, an example of people confusing ground and current return. Somehow we're thinking this filter needs to have one ground, which is just not right. A filter doesn't need to have one ground and ignoring the fact that the currents, they were directing basically the input and the output currents and making them share the same via, which is just awful advice.

Okay. So the number three problem I'm seeing, I say awful power converter layout. And I mentioned before today power converters have come a long, long way even from 10 years ago and certainly from 20 years ago. But the power converters today are very quiet in terms if we lay them out, right? If you got a low power converter in it and it's switching at a megahertz or faster, you should never see any of that switching noise appear in your radiated or your conducted emissions test. If power bus noise is causing you to fail radiated or conducted emissions, you haven't properly laid out that power converter. And laying out a power converter it's not rocket science. It's relatively straightforward.

There are two things we need to do. We need to identify a switching node and a switching current loop. Switching voltage node and switching current loop. Those depending on our power converter topology, if you're stepping down a DC voltage, let's say from 12 volts to a smaller voltage, you almost certainly are using a butt converter topology. If you're stepping a voltage up, you're most often using a boost converter topology. You could be using a flyback topology depending on your situation or you could be using like an H-bridge if we're doing a DC to AC kind of conversion.

But for any given topology, we can identify one, sometimes two nodes in our schematic basically, nodes in our circuit where the DV/DT, the time rate of change of the voltage has to be very high in order for this circuit to work. But there's only one. Everywhere else we can slow things down. So we need to identify that one where the voltage is switching very rapidly and we just need, first of all we need to make it small, and we need to keep it away from anything that we don't want to couple noise to, which usually is everything. So we just identify that note and keep it small. That's the basic rule. And it's relatively straightforward once you understand what to do and relatively lazy to find.

The other thing is we have one loop in this circuit where the DI/DT the time rate of change of the current, it has to be very fast. We need to keep that loop small because we'll get magnetic field coupling from that loop if we don't keep it as small as possible. But again, there's only one loop. It's not a lot of loops and if we keep that small, we keep that switching voltage generally, we've got a good design, unless we do something else foolish, we shouldn't see radiated or conducted emissions from [inaudible 00:40:19].

And I should say, the higher we go in power of course, if it's a kilowatt that we're working with now, maybe we will see radiated and conducted emissions at some level. But again, from a design standpoint, we're still focusing on the same things. So looking at the same board we were looking at before, when I'm reviewing a design of a board, I'm always looking for inductors because inductors are either part of a filter or they're part of a power converter, and either case I'm very interested in the layout of the circuitry around that inductor. So here we're showing in this one, they got they're taking 12 volts and turning it into 3.3 volts with this particular inverter. There's the inductor. Maybe I need to change my color of my pen here.

So there's the inductor. The switching node, this is a buck converter stepping the voltage down. So the switching node is connected to the switches and the inductor. In this case, these switches are outside. We have two of them in parallel, two high side switches and two low side switches. So this is a relatively big butt converter, but still from a layout standpoint, it's the same thing. We're identifying this switching node, which is that node of the circuit. And we need the DV/DT on that node is very high. We need to keep that node small in the layout, and we need to keep it, we need to locate it so that it can't couple to other circuits, particularly the input or the output of the inverter, because the input will take it back to the LSN for a conducted problem and the output will take it to the rest of the board, which often can result in a radiated admissions problem.

So we need to assign it and keep it smalls. So I'll typically do color all the nets on the board, one particular color, and then I'll go look for that switching node, and I'll make that a different color. So here we've done it and colored it red. That's the switching node for that circuit on this particular board, I also colored the V out blue and the V in yellow. And what we see from that, this is layer one, which is actually not the side where the circuitry is, so I'm not sure generally the [inaudible 00:42:58] and in this case, it was on the bottom of the board. You shouldn't let that switching node come to the opposite side of the board, but they did in this particular design.

And you'll see that it is right next to the V out. So they've got a node there. They did keep the size small if we look for the switches, you can kind of see the outline of the switches, which are on the other side of the board, but the node couldn't have been much smaller than that, but the big mistake was getting it right next to VL because now that electric field coupling from the switching node to the V out is very strong. And so they haven't properly kept that switching note away from the other circuitry on layer one. If we look at layer eight, this is the side where the switching does occur. Here, it's fine. They really shouldn't have let that switching node go down on to layer one. I don't know why they did, because it's not like current is going to go down and use that layer. But for whatever reason, if they had just done this, this looks good because now we basically have the input coming to the transistor. There's the switching node. There's the low side transistor going to the ground. They've done that layout pretty well.

So that's the switching node. We also need to pay attention to the switching current loop. So where is the switching current loop? That goes basically through our switching transistors to ground up through the decoupling, the sea input capacitors and back up. They've done a pretty good job because they basically ... Well, they would've done a pretty good job. They basically, the current's got a circle on two layers, but it's got to go across here through the switches on the ground plane underneath and back, but they cut their ground plane in order to route AV out, trace right in the path of the switching current loop. So their DI/DT they, they forced that high DI/DT current to have to go around that cut in the ground plane. So that was another sort of major mistake that they made with this layout.

Okay. So why are people making awful layouts? It's because quite often they are following the design advice that came with the switching power converter and the people who are selling these the converter chips recommend some awful layouts quite often. Sometimes they recommend a good layout, but quite often, it's just bad advice. If they have something called a P ground, that's different from the ground ground, that is definitely bad advice. There is no reason to do that. Particularly if you're switching in a hundred kilohertz or faster, there's never a good reason to have an isolated P ground. In this particular case, it's especially egregious because if we look at, let's see, there's a V out. So this is the switching node. That's pretty small, but then they routed their input capacitor right over the top of the switching node. And the input capacitor is connected to VN, and that takes it right out to the LSN so routing the input capacitor over the top of the switching node, definitely a bad idea.

Their switching current loop goes through there's VN through that to ground and takes it back. So we'd say, well, that's the switching current loop, but they've pulled that switching current loop up off the actual ground plane. If they had connected to the ground plane, things would have come in to see in down to the ground, back under sea and on the ground. And back, they wouldn't have tried to flow in a circle. They would've come back under the component that would've been good. But then probably the most egregious thing here is the switching current loop has an isolated ground and they're sharing that with the output capacitor.

And here it's showing this is a different app note from a different manufacturer, but it's showing the same mistake. The idea that my input capacitors and my output capacitors are brought to a single point. That's their concept of single point current return, which is all single point around often a good idea, single point current return, always a bad idea. So I'd have my input currents and my output filter using the same point connection point routed to the same place, just a terrible idea. And that's just a really bad layout.

I did want to show in case anybody recognized where that other layout came from. This is from the same supplier, but this is a good layout. This is what a good layout would look like. Here's the switching node coming under the inductor. It's small, it's as small as it possibly could have been. It really it's the biggest part of it is the pad under the inductor. And it's right up next to the converter. So that's a good switching node. If we look at the input current loop, there's the input capacitor, it's small. One thing that doesn't show up here is that we have a solid ground plane on layer two, which I would pretty much always recommend that we have a solid ground plane, either on layer two or layer three, right underneath not only our power circuitry, but the other high speed digital stuff also. But anyway, if we have a solid ground plane, our loop area, the currents that are induced in the ground plane are in the opposite direction. And they really minimize that inductance.

So that's an example of a good, somebody has paid attention to the switching voltage note on the switching current loop, and they've minimized them and kept them away from other things. The V out filtering is way over here. And well ... No, I'm sorry. The V out filtering is here. I was going to say we wouldn't go through a bunch of traces to filter, but here they've gone right to ground. Going to the ground fellow I'm going to mention this later, but that's not a good idea, but their ground vias are right there. And it's the output ground connection and the input ground connection are not in the same place, they're separated, which is essential.

So what do you need? Inappropriate power bus decoupling. That's number four on the list as much as has been written, and as many presentations as there have been about power bus decoupling, you would think everybody would be getting it right. The problem is what's right for everybody is not the same thing. If you don't have power planes in your board, if you're routing a board that does not have a solid power plane, which a lot of the designs I review have no power plane. And that is absolutely fine in many cases. Then you have one set of rules. You basically need a low inductance connection to the power and ground pin, and that's it. You need to do as good a job of that as you can.

If you have closely spaced power and ground planes, which also a lot of the boards I look at have that, particularly if you've got six or more layers, you probably have one pair of power and ground planes that are closely spaced. And that's when you hear the signal integrity, people talk about power bus decoupling, they're almost always assuming that this is the case you have. And then we have another set of rules for what we do for decoupling. And if we have power planes, but they're not closely spaced to the ground planes, we have another set of rules for the decoupling. And we don't have time to talk about each of these individually today, but just mention in all cases, we want to minimize the inductance. That's clearly a key factor in every case. But I want to talk about two common cases that you're likely to come into in terms of multilayer boards anyway, with power planes. And up here, I'm showing a quad flat pack device that has two power pins and three ground pins.

So maybe it's got 50 to 100 pins total arranged in a circle. But in this case, we have a ground plane on layer two and a power plane on layer five. Before you say, oh, that's a terrible stack up. This is not a terrible stack up. It would be a terrible stack up for some designs like doing it for this board would be terrible, but don't fall into the trap of thinking that one particular stackup is bad. It really depends on your situation, what you have, what frequencies you're working with, how much high speed signaling you're doing on your board. And again, what types of components you are connecting to the board. So let's say that quad flat pack device had a hundred pins, but only two of them were power pins. Obviously that device does not need to get amps of current in nanoseconds because the package is not designed to do that.

So having ground on layer two and power on layer five, we're going to be able to get the current to that device that it needs. But if we want to keep that noise off other stuff, keep that noise from spreading. What we need to do is we need to have each of those two power pins needs to have its own decoupling capacitor, and they need to share the connection to the most distant plane, which in this case is the power plane. And by doing that, we're utilizing the mutual inductance between the power and the ground planes to basically force current to be pulled from the decoupling capacitor. So the decoupling capacitor supplies the charge rather than the plane voltage dropping, and then the coupling capacitor responding. The de coupling capacitor supplies the charge directly to the device. It is not waiting for the voltage on the planes to drop and then responding to that.

So in this particular situation, you say, I've got capacitors out here, I've got capacitors down here. And then those two capacitors are doing all the work for that device. All the other capacitors are waiting for the voltage in the planes to drop and then they're responding providing charge to counter that drop in the voltage. But the two local capacitors are not waiting for the voltage in the planes to drop. And that's the way we need to do the decoupling. Now, of course here's a BGA device, maybe this got 300 pins and 20 of them are power pins, 30 of them are ground pins. Clearly that's a device that needs a lot of charge fast. We can't put ground on layer two and power three or four layers away. We have to have power and ground that are right on adjacent planes, hopefully near the side with that active device. If I had active devices that were similar on the other side, I would also have a power ground playing pair on the other side, but mostly we'll put all those real critical components on the same side of the board.

Now everything's different. We can't decouple each one of those power pins, and we don't want to. Basically when they need charge fast, they're getting it from that plane capacitance. And all of the decoupling capacitors on that board are waiting to see the voltage in the planes drop, and then they're providing charge. And if we look at this particular case, and we say, which capacitors are responding first, which are supplying the most charge when that BGA device depletes the charge in the planes or starts to deplete the charge in the planes. And then it's all about the inductance of their connection to the planes.

And we look at these and we say, well, these are right underneath the device, but because we're going ... This is a 14 layer board, I'm sure [inaudible 00:55:32] it's done. Anyway. I'll admit, so we've exaggerated the scale. Of course, if that were all way through the board, the board's not that really that thick. The components that we put that have to go through vias, 10 layers or so to get to the power planes. That's a lot of inducted. Whereas the capacitors that we put on the top layer that are only one layer away from the power ground plane pair, they're going to be the ones that respond first, even if they're farther away, physically than the ones, right under the component.

And we just need to be aware of that. And depending on what our particular scheme is, we need to do our decoupling appropriately. So let's look at that board that we were talking about before and just say, well, how do they do? This is very typical of we're showing the power layer there and I've colored the different power voltages different colors. Distributing all your power on one layer, very common. And actually I recommend doing that because you don't want power layers overlapping. Usually you don't need that to happen and you don't want it to happen. So having one power layer with all of your voltages distributed on it is good. We're focused here on one particular voltage and VDD, DDR one V one, which is probably 1.1 volts. And that's this yellow plane there. And we see that we have a whole bunch of decoupling capacitors on there, which is probably good and probably appropriate, but let's go and focus on how are they connected basically?

And I apologize here because I switched buses because actually they did a pretty good job on the bus I showed before. I was looking for one where they did not. So here we're seeing one particular voltage VDA, DLL, 0V8. They have three decoupling capacitors showing on the schematic. One's 4.7 microfarads and an 0805 package. But they've got one over here that's 0.1 microfarads and it's an 0201 package, very tiny capacitor. So the whole reason for using a very tiny capacitor is we want to low inductance connection to the planes and the smaller the package size, the easier it is to get [inaudible 00:57:55] and to get a very low inductance connection.

And if we look at how they connected it, it's shows up right there. And we're not seeing all of the ground planes. The ground is fine. There were several solid ground planes in this design and the ground is fine, but the voltage plane coming over ... The capacitor is hanging off the edge basically of the voltage plane. And I see that all the time and it just unnecessarily adds inductance to the connection. We should tuck that capacitor up to where it solidly got both planes underneath it, particularly in an 0201 package where the whole reason we used that package size was to get a low inductance. So it's not a terrible error, but it's not optimum.

One other thing I found on this board, which I'll mention is for third decoupling, they have a bunch of vias caps. These are commonly called X2Ycaps. X2Y capacitors are very nice if you're filtering differential lines or two balanced lines, it's a balanced capacitor structure. It works well for balance filtering. Power bus de-coupling is not a balanced filtering situation. These capacitors really don't make any sense. They offer no advantage that I can see. It's not that they're terrible, but they do focus ... My voltages come down to one single pair of vs in the center here. We're showing it in the layout right there's one of them, but we don't want our grounds to come together before they connect to the ground plane of the board, we'd be better off with two capacitors with separate grounds. And particularly if we go any distance. I'm not saying these capacitors are terrible, but they are not providing an advantage that's equivalent to their cost ad. They're really inappropriate. It's the wrong design for power bus to coupling. It's exactly the right design for filtering differential signal lines.

And finally for power bus de-coupling I'll just point out. This is one I found. So there's three capacitors. They have a fair right be in series with the power, which is often a good idea. They have three capacitors with very different sizes. The 0201 is connected right under the pins, that's one nice thing about these tiny capacitors. You can put them right in and above grid of array or a Pin grid array get them right near the pin. And then the other two are located way up here. There's a lot of inductance before you get to those other two. It's not that that's a terrible design, but it's one of those situations where that small value capacitor and the large value capacitors are likely to ring with each other and it probably should not have been laid out that way.

Okay. Just quickly, a good capacitor connection would typically look like that. If we had widely space planes, we need to share the connection most is space planes, we don't need to share both connections, but the one going to the power layer typically would be shared. And if we had closely space Planes, then just putting those two vias off to the side of the pads of the cap, that's a good low inductance connection. That's good. This one's not good, I'll change my pin color again. I can't seem to change it. Anyway, going off the ends of the pads is not good, we need to get the vias close together and it's certainly really bad to share vias. Decoupling capacitors have to have their own connections to ground, we can't share connections to ground the way we're seeing there. Oh, I know the problem, I selected the highlighter instead of the pen.

Okay. There's a lot of examples of really bad power bus decoupling in the app notes. And I just don't get your design advise from application notes. Particularly application notes that are more than say a few years old, there's a lot of really bad advice telling you to do exactly the wrong thing out there.

Okay. Quickly, large and small ceramic capacitors in parallel. The problem with doing something like this is the large value capacitor has a self resident frequency and above that, it looks like an inductor. And so we have one capacitor that will look like an inductor and the other capacitors still look like capacitors. There will always be apparel resonance between the self resonant frequencies of any two capacitors with different values. That didn't used to be so much of a problem, but I've had two products that were brought in that were failing radiated emissions. Both of them were this problem.

You can't put a 10 micro capacitor in parallel with a 0.01 micro capacitor or getting zeros that are too far apart, there's a lot of room for that null in between to just pop up and be very strong, try to make all your capacitors about the same value. I realize there's some advice where we do stagger values and we design our power bus in a very specific way. If you're doing that fine, but if you don't know what you're doing, don't put these large valued capacitor. The Ceramic capacitors. If one of them is an electrolytic or some of them are, if the big are electrolytic and the small ones are ceramics, that's fine because the electrolytic will have enough equivalent series resistance to damp that parallel resonance. And that used to be the case. So the reason we're seeing it more now is because you can buy large valued ceramic capacitors with very low equivalent series resistances and you put two of those in parallel with decades different values and they will have a parallel resonance.

And finally common-mode chokes. Most of you shouldn't be using common-mode chokes. Common-mode chokes are very balanced structures. So if you've got a balanced, let's say you're filtering your power input, and your power is coming in balanced then maybe a common mode choke is going to be appropriate. But if one side is labeled ground, so we've got a balanced power coming in and now we've got something that's unbalanced because one side's ground and the other side's not ground.

When you go from unbalanced to balanced, we get common mode to differential conversion, or differential mode to common mode conversion. So normally we avoid that. In some cases, we are forced to have that happen because the EMC compliance test is balanced. They say, I'm going to take battery plus battery minus, and I'm going to have two LSNs and I'm going to basically measure common mode and differential mode emissions. But on your product, you didn't have two modes, you just had V in and ground. You didn't have three conductors, you just had two conductors. You could only have one mode. It was basically, if we call that common mode, what we could call a differential mode of common mode, it doesn't matter. There's only one mode. The thing to do is filter it, and then it doesn't matter that you converted here. If we say we were unbalanced here and balanced here, what we're going to measure here is going to be half common mode and half differential mode, that's fine.

If we filtered it here, we've taken care of the problem, we don't have to worry about mode conversion. Don't be thinking I need a common mode choke because I have both common mode and differential mode. The common mode was cerated by the shift from being unbalanced to balanced. So if there were a rule, I'd say, don't use a common mode choke if any of the things connected to it are labeled ground, because that's not a balanced configuration where you are going to use a common mode choke are going to be cases where ... So here I'm showing two things, label ground. There's one thing, label ground, don't do it.

Use it when you have a balanced power coming into let's say you come into a transformer, so you're balanced and you've got the power coming into a transformer. Now a common mode choke might be exactly what you need. And I'm just going to sum up with some other things to watch out for connecting. I don't like ground fill on multilayer boards, where we have solid ground planes anyway. Ground fill doesn't really help that much and I used to tell people if you want to put ground fill in, that's fine, but you don't need it. Well, I don't tell people that anymore, because if you've used ground fill, I'm seeing lots of boards where people connect to the ground fill rather than to the ground plane and you just can't do that. You need to connect if it's critical, if it's a filter capacitor or decoupling capacitor connecting to the ground fill is not the same as connecting to the plane.

It's okay if you ... Here I'm showing you're connecting to the ground fill and the plane at the same time, that's fine. But what I'm saying quite often on boards with ground fill are components that are connected to the ground fill and the current has to travel across the ground field to find a via to the ground plane.

I mentioned this before, there are no good or bad layer stackups. Lots of the boards that we guarantee are going to be compliant. The first time they're tested have signal. If it's a four layer board signal ground power signal, that's fine in most cases most. So the people designing with four layer boards are not sending a hundred megabit per second signals around, particularly off the board and it just works out fine as if you've band limited things, two ground planes on your board. And I mentioned the one where the power in the ground and the six layer board were separated by several layers. Sometimes that's exactly the right thing to do and sometimes that's a terrible thing to do. But be careful about the advice that says avoid this stackup or this is a terrible stackup. I just don't agree with that. It's exactly true for some kinds of boards, but I work with a wide variety of boards and there is no rule about the stackup that always applies.

Also, you rarely need to isolate analog and digital returns. If you're doing that, make sure you understand exactly why you're doing it and make sure it's necessary. Generally, we should have one solid ground plane that [inaudible 01:09:02] Xes our current return for everything high frequency anyway.

Last final words of advice. Follow the currents, control your transition times. If you're balanced, stay balanced. If you're unbalanced, stay unbalanced with your signals, don't switch. And I'll ensure that your filters don't resonate. Don't don't try to improve a filter by adding more capacitance or adding more inductance to a design that's been calculated to not resonate. Things that you don't have to worry about, right angle corners on traces, via fences on outer periphery of the board, 28-H rule, radiation from microstrip traces, radiation for ICS. None of that is a thing. None of that is something that basically needs to be done or needs to be accounted for in a design. There're just rules that have sort of developed over the years, really with no basics. I wouldn't say with no basis in physics, but they just don't apply to today's boards.

And then I'll end with this final words of advice, be careful about EMC design guidelines. A lot of the worst boards I've seen in the past have been boards where people have been trying to follow design guidelines without an understanding why they're trying to follow them and they end up doing just crazy things.

And don't rely on application notes for your EMC advice. There's some really, really bad advice. They often will tell you to do exactly the opposite of what you really should be doing. Even app notes by the way [inaudible 01:10:42] manufacturers can have really, really bad advice in them. If you do need to meet EMC requirements on the first pass I'd recommend you get somebody who can help you, who will guarantee or at least give you some reasonable chance. They're easy to meet, but you got to do everything right. If you do one thing wrong, that can cause you to fail an EMC test.

And also if it's a safety critical product or component, I would highly recommend that you get somebody who's basically an expert in EMC to help out. If you take that into the lab and test lab, and you modify it to the point where you pass the test, you've got a product that will pass that test in that lab. You haven't got a product that's going to work reliably in a system. And if it's safety critical, you really shouldn't be designing your products that way.

So with that, I'll stop here and we'll see if anybody has any questions.