The Edge-Sensing BOM: What to Spec, from IMUs to Interfaces

Key Takeaways

• Spec every part by what it can decide locally and what each decision costs in energy, because the in-sensor-versus-host question repeats on every line of the BOM.
• The always-on features are the differentiators: wake-on-event interrupts, in-sensor classifiers, and FIFO depth determine how long everything upstream gets to sleep.
• Memory has become a first-class BOM line in 2026, with LPDDR bandwidth and availability influencing designs as much as the sensor choice does.
• I3C is becoming the default sensor bus, bringing dynamic addressing and in-band interrupts built for wake-on-event designs.

One Architecture, Seven Line Items

An edge-sensing product lives or dies on four things: the sensors that watch the world, the hub that runs the models, the memory that feeds them, and the interfaces that tie the stack together. Pick them by peak ratings, and the design works on the bench and dies on the battery. A companion article, On-Device Inference Is Remaking the Sensor Stack, presents a better approach: push each decision to the cheapest stage that can make it. This article turns that rule into specs, part by part.

The Spec Sheet, Consolidated

Let’s take a look at the specs that pin down each part, the edge-AI feature worth paying for, and the typical interfaces.

IMUs: Range, Noise, and the Free Classifier

The inertial measurement unit (IMU) is the workhorse of wearables, asset trackers, and condition monitoring, and it’s also the most mature example of in-sensor AI. Four spec areas determine the right IMU:

• Concurrent full-scale ranges. Dual-range parts capture 16 g motion detail and 80 g impacts, or 256 g industrial shock, simultaneously, ending the forced choice between resolution and headroom.
• Noise density and gyro bias stability. These set dead-reckoning drift, and consumer activity classification tolerates far more of both than navigation does. Buy the grade the algorithm needs.
• The in-sensor engine. No-code decision trees and state machines classify events without firmware, while programmable in-sensor DSPs run custom networks. Confirm tool support and how many trees or states actually fit.
• FIFO depth and interrupts. A deep FIFO lets the host batch-read and sleep longer, and wake-on-event pins are what make tiered wake-up real.

STMicroelectronics leads in-sensor intelligence, with TDK InvenSense, Bosch Sensortec, and Analog Devices covering the consumer-to-industrial spread. For automotive and long-lived designs, AEC-Q100 status and 10-year longevity programs are filterable specs.

Time-of-Flight: Zones, Ambient Light, and the Module Advantage

A time-of-flight (ToF) sensor reports distance, not an image, which is why it has spread from phones into laptops, robots, and appliances as a presence and gesture sensor with built-in privacy. Direct ToF (dToF) times photon returns on-chip and hands the host distance plus a confidence figure, while indirect ToF trades power for denser depth maps. Use these three specs to sort the field:

• Zone count. Single-zone ranging up through 8x8 multi-zone arrays covers presence, posture, and gesture, and the newest modules reach 54 x 42 zones at ranges up to 9 m for depth mapping.
• Range under real ambient light. Sunlight immunity is a dToF strength over passive infrared (PIR), but confirm the datasheet range at the light levels the product will actually be exposed to, along with field of view and field of illumination.
• Module packaging. Most parts co-package the emitter, single-photon avalanche diode (SPAD) array, and optics inside a few-millimeter footprint, collapsing several BOM lines into one. Discrete versus module is as much a sourcing decision as an engineering one.

60 GHz Radar: Decide Where Classification Runs

Millimeter-wave radar detects macro-motion and micro-motion (including breathing) through line of sight, in the dark, and without capturing identifiable imagery. Some parts serve as front ends, running frequency-modulated continuous-wave (FMCW) sweeps and on-chip FIFO storage, while a lightweight model classifies on the host. Others put a DSP on-die and run the classifier in the sensor. Once that decision is made, pay attention to these three specs:

• Sweep bandwidth, which sets range resolution and micro-motion sensitivity.
• Channel count and antenna-in-package, which set angular resolution and remove the RF layout burden.
• Duty cycling and dynamic reconfiguration, which switch a part between presence and gesture configurations on demand, are where the always-on budget is won.

The vendor field splits along application lines. Infineon leads in consumer and building automation, while TI dominates automotive in-cabin sensing. Module vendors offer another option: pay a premium, and the antenna and matching arrive pre-engineered.

MEMS Microphones: SNR Is Half the Spec

The microphone is where the always-on power story starts, and signal-to-noise ratio (SNR) is only part of the spec sheet. Here’s what else to check:

• SNR and acoustic overload point (AOP) together. A loud event that clips is lost to the model, however quiet the noise floor, so vendors now raise AOP alongside SNR; premium digital parts push SNR near 70 dBA and hold overload points of 133 dB SPL.
• Output type. Pulse-density modulation (PDM) is simple and ubiquitous; I2S and TDM deliver a clean digital stream to the host without an external codec. Match the host’s audio peripheral before selecting a part.
• Wake-on-sound. Acoustic activity detection runs from about 20 µA, holding keyword spotting and the host itself in reserve until there is something to hear.
• Array matching. Beamforming requires matched phase and sensitivity across parts; check the matching spec against the single-unit values.

Sensor Hubs and Host Compute: Buy Throughput

The host aggregates the sensor streams and timestamps and synchronizes them, runs what the sensors cannot, and wakes only when the tiers below say so. TOPS ratings alone mislead, so at part-selection time you should:

• Confirm the model fits. On-chip SRAM for activations, memory bandwidth, operator support, and compiler maturity determine delivered throughput. Run the actual network through the vendor toolchain before committing the socket.
• Spec the always-on domain. Deep-sleep current with the sensor hub still awake is the draw the battery lives with.
• Weigh the toolchain like silicon. Software maturity is the usual gating item, regardless of which vendor flow or third-party platform the team uses.
• For industrial designs, add secure boot, model protection, and lifecycle commitments to the list.

The host tier itself now spans a wide range. At the low end, NPU-equipped microcontrollers such as ST’s STM32N6 brought accelerated vision and audio to MCU power and price budgets. A step up, parts built around Arm’s Ethos-U85 carry transformer operators to the endpoint. At the top end, edge SoCs such as Qualcomm’s Dragonwing Q-8750 run multimodal pipelines and small language models. Match the tier to the heaviest model the product will run, with headroom for the one it will run next year.

Memory: The Line That Now Sets the Budget

Memory decides whether the design works and, in 2026, whether it ships on budget. On-chip SRAM is the true ceiling for MCU-class inference, since activations and working buffers must fit, with a typical envelope of 256 KB to 512 KB. Flash holds the quantized model, roughly a quarter the size of its 32-bit original once it’s down to 8 bits, plus headroom for over-the-air updates and A/B slots. Once vision pipelines or small language models arrive, external LPDDR follows, and bandwidth in GB/s, as much as capacity, sets what the accelerator delivers.

But specifying memory is the easy part. DRAM capacity has shifted toward AI data centers, pushing up LPDDR prices and stretching lead times. Check availability, lifecycle status, and second sources before the BOM freezes. In this cycle, that check is part of the spec.

Interfaces: Shape Traffic Before It Gets Expensive

The bus sets pin count, power, and how many sensors share a line. An interface exists to shape traffic before it reaches the expensive part of the system, and the defaults for doing that have changed:

• I3C is becoming the sensor-bus baseline. Dynamic addressing allows several ToF sensors or IMUs to share one bus without address juggling. In-band interrupts suit wake-on-event designs, and I2C backward compatibility eases migration. New sensors increasingly ship with it alongside SPI.
• SPI stays for the high-throughput jobs, above all radar FIFO reads and high-data-rate IMU streaming.
• PDM, I2S, and TDM carry audio, with TDM lanes scaling to microphone arrays.
• MIPI CSI-2 feeds cameras and image-class ToF into a local vision pipeline, so only features and metadata travel upstream.

From Spec Sheet to Sourcing

The principles from On-Device Inference Is Remaking the Sensor Stack apply to every line of the BOM: resolve each decision as low in the stack as possible, and favor parts that move results rather than raw samples.

Every spec above is also a search term. Full-scale range, SNR, and on-chip memory map to parametric filters on Octopart, and where a spec is newer than the filter set (such as zone count or an in-sensor NPU), the datasheet sits one click from the same results. Spec to the sleep budget and filter on the numbers that set it, and the edge-sensing BOM adds up to one coherent architecture.