New Snapping Options
Enhanced snapping options allow for a smooth and controlled design experience for both routing and placement.
Pin-Package Delay and Via Delay in High Speed Length Tuning Take a look at the inside of some integrated circuit packages, and you’ll find a number of wires bonded to the semiconductor die and the pads at the edge of the component's package. As a signal traverses makes its way along an interconnect and into a destination circuit, signals need to travel across these bond wires and pads before they are interpreted as a logic state. As you look around the edge of an IC, these bond wires can have different Read Article
Should You Use Tight vs. Loose Differential Pair Spacing and Coupling? We get a lot of questions about trace impedance and how to calculate the right trace size to hit a specific impedance in a manufacturable PCB. Just as important as determining an appropriate trace width for a single-ended trace is determination of an appropriate spacing between two traces in a differential pair. So the question is, how close do the traces in a differential pair need to be to each other, and is the need for “tight coupling” really Read Article
Microstrip Ground Clearance Part 2: How Clearance Affects Losses In a previous article, I provided a discussion and some simulation results on the necessary clearance between impedance controlled traces and nearby grounded copper pour. What we found was that, once the spacing between the pour and the trace becomes too small, the trace becomes an impedance-controlled coplanar waveguide (with or without ground). We also saw that the 3W rule for the spacing between the trace and the grounded copper pour is a bit Read Article