Every microprocessor is built on an instruction set architecture (ISA), which defines the high-level functions used to execute computing operations with digital data. An ISA is one of the core components of a CPU that defines how the software will communicate with the hardware. It basically defines commands in a way that a machine can understand and typically include instructions for memory operations, data handling, arithmetic operations, logic operations, and control flow operations. An ISA also defines how instructions are stored, encoded, and accessed.
The dominant ISAs over the past two decades have been x86, x64, and ARM, all of which have driven personal and embedded computing adoption to the levels we see today. While ARM is among the most-used process architectures, a new open-source competitor is being embraced by the semiconductor industry. This alternative architecture is RISC-V (pronounced “risk five”), and it has been embraced by the open-source community and semiconductor vendors as an alternative to ARM and x86/x64 architectures.
While we don’t expect Intel’s x86/x64 or ARM architectures to go away anytime soon, RISC-V provides a compelling open-source alternative. Now some semiconductor vendors are supporting RISC-V implementations in their FPGAs, and the open-source community has responded with a wave of vendor IP and libraries to help speed up development. In this article, we’ll look at some of the most recent RISC-V-based products released to market by semiconductor vendors.
The RISC-V ISA is an open-source ISA that can be used to define the core low-level digital data manipulations that are implemented in a microprocessor core. The specification uses a set of 49 instructions that are compatible with 32-bit implementations in hardware. The word width can be used at 64 bits with a set of 14 extension instructions, or up to 128 bits (in theory). As an open-source specification, the primary instruction set and the optional extensions can be customized, removed, or totally rewritten to provide a customized or highly specified processor architecture for use in new chips.
Since RISC-V development began in 2010 (at Berkeley’s Par Lab), the creators of RISC-V went on to start SiFive, a processor core IP company. The company provided the very first fully open source processor core architecture built on RISC-V. The architecture can be used as the base specification for designing a digital logic architecture that implements the RISC-V ISA and any additional user functions.
Building a custom application processor on RISC-V gives developers an excellent path toward building a new processor on custom silicon, or building a reconfigurable processor on an FPGA. Logic development with RISC-V on an FPGA brings its own benefits thanks to the customizability and reconfigurability of FPGA platforms, as well as their high compute density. For embedded applications requiring more than an RTOS, RISC-V cores can be ported to support Linux distributions.
RISC-V developers can use the instruction set and its hardware implementation in two possible ways: to develop custom logic designs on a new chip design, or to implement specialty logic in an FPGA. The industry is just starting to use RISC-V as a core architecture for microcontroller designs, but these components are not available at scale.
Currently, the range of commercially available processors that can support RISC-V are limited to FPGAs, where RISC-V is supported with vendor IP. For the time being, building on an FPGA is an excellent option for systems developers, both from a prototyping perspective and in terms of designing customized application-specific hardware that is heavily streamlined for heavy computing workloads.
The PolarFire platform from Microchip is the company’s flagship RISC-V-based FPGA platform, where a piece of ready-made processor is built directly from FPGA interconnect fabric. The PolarFire product line encompasses multiple components and part numbers, all of which aim for lowest power consumption with high compute density in embedded applications. This FPGA SoC can be heavily customized using the Libero SoC Design Suite, and core IP is available for use in the PolarFire platform. In terms of hardware capabilities, the system can support 12.7 Gbps transceivers and PCIe 2 I/O.
Efinix is a smaller semiconductor vendor, but they have embraced RISC-V in their vendor IP with two SoC products for the Trion and Titanium products.
Sapphire SoC - This RISC-V implementation is a user-configurable instantiation with an optional memory controller (DDR or HyperRAM) and multiple interfaces (up to 32 GPIOs, 3 I2C masters, 3 SPI masters, and 3 UARTs) built into device core.
Edge Vision SoC - This library is intended for embedded vision applications and it includes standard interfaces for systems in this application area. Additional user functions like specialized DSP blocks or data manipulation can be added to this IP with developer tools.
Development products are available for both product lines to help users get started with a new platform, such as the Trion T20 MIPI D-PHY/CSI-2 Dev Kit for vision applications.
Bluespec Inc., an official development partner for Xilinx, now supports 32-bit RISC-V core implementations on Xilinx FPGAs. This SoC IP targets applications requiring a single processor core running Linux on an FPGA. The RISC-V RV32IMAC SCL supports the RISC-V base Integer Instructions (I), Integer Multiplication and Division (M), Atomic (A), and Compressed Instructions (C), Single and Double-Floating point instructions (FD). Users can implement the Bluespec RISC-V 32IM core IP on Xilinx FPGAs using the standard set of development tools in the Vivado IDE.
The benefit of using hardware from a major vendor like Xilinx is the level of open-source support and development products available for building an embedded application. The broad portfolio of Xilinx IP can be used alongside the core logic architecture defined in RSIC-V to build a customized hardware implementation. As one example, the Freedom E310 core IP from SiFive can be programmed onto the Arty A7 development platform from Digitlent using the Arduino IDE.
Other companies have made recent product announcements regarding use of RISC-V cores in new semiconductor products. These products are intended to be something closer to application processors that still offer some general-purpose programmability via an embedded application. Some of the recent product announcements include:
Renesas Application Specific Standard Products (ASSPs), a line of RISC-V-based products intended to blend general-purpose processing with application specificity.
Picocom PC802 5G NR SoC, an application-specific processor for 5G NR small cells interfacing with radio units via O-RAN Open Fronthaul eCPRI or JESD204B.
Intel will now support RISC-V through its new foundry services division, allowing fabless companies to create designs that are compatible with Intel’s silicon processing capabilities.
Kneron’s upcoming RISC-V-based AI accelerator chip intends to bring autonomy to driverless cars by supporting Level 1 and 2 ADAS systems.
Chip design is a tough discipline, but using an open-source instruction set like RISC-V as a development framework is a great way to speed up chip architecture design. The challenge for a logic designer is to create the logical circuits that represent the instructions defined in the RISC-V specification. For a microcontroller or MPU, this is a tall order and it requires plenty of experience; it is not something a designer would typically do alone.
However, for an FPGA, there are many RISC-V implementations that can be used to quickly build a highly extensible architecture that incorporates custom user functions. This is something that vendor tools and the open-source community have spent a significant amount of time building, and now there are many RISC-V cores that can be used in FPGA development. To get started, take a look at some of these GitHub repositories:
This is just a small cross-section of what is available, there are many more open-source repositories you’ll find on GitHub that are useful with a variety of FPGAs. Additionally, for any FPGA developers interested in building on the ISA, RISC-V International launched a RISC-V Training Partner Program. Developers can gain greater understanding of the benefits of open cooperation and expand their knowledge of RISC-V.
The great part of the RISC-V architecture is that it can be modified and sold on the open market. Fabless semiconductor startups are now providing their core IP based on the RISC-V ISA for license to other companies under a similar business model as ARM. Similarly, companies are making their vendor IP available for purchase and use in FPGAs from major semiconductor manufacturers. As these RISC-V based components come onto the market, we can expect them to offer high levels of specificity for advanced applications.
When you’re ready to start selecting your FPGA, programmable SoC, and other components for your new system, make sure you use the advanced search and filtration features in Octopart to find all the advanced components they need for advanced designs. When you use Octopart’s electronics search engine, you’ll have access to up-to-date distributor pricing data, parts inventory, and parts specifications, and it’s all freely accessible in a user-friendly interface. Take a look at our integrated circuits page to find the components you need.
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