Roughness of Copper and its Effect on Signal Integrity

Zachariah Peterson
|  Created: July 31, 2022  |  Updated: November 26, 2023
Roughness of Copper and its Effect on Signal Integrity

I am very honored to have Bert Simonovich, a very well-known expert in the signal integrity community, in today’s episode. Bert developed the "Cannonball-Huray" model used for transmission line loss modeling, which has been adopted in several popular EDA tools.

We will be discussing several topics relating to copper roughness, including different approaches to ensure signal integrity in your PCB design.

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Show Highlights:

  • Bert shares his background and experience
    • He did his microprocessor systems back in the late '70s and later worked at Bell-Northern Research in Ottawa, Canada
    • In the 90s he transitioned to Nortel from where he specialized in backplane design and signal integrity
    • He founded Lamsim in 2009
  • Bert retrospects using photo tools which is now the photo plotting with Gerbers. His experience helped him understand the mechanics of PCB construction
  • A client’s demand led to extensive research involving dielectric material comparisons and foil roughness
  • With various PCB surface roughness models, how to determine which process to move forward with?
    • Bert explains the Design Feedback Method
    • Cannonball technique is a roughness modeling approach which Bert also described as a heuristic method
    • Checkout Bert’s articles on SI Journal
  • Bert gives a detailed explanation of how copper is being used in PCBs
  • HDP user group international published a research paper Smooth Copper Signal Integrity in 2016
  • Bert and Zach agree that PCB construction is complicated and it is highly recommended for PCB designers and SI engineers to learn more about the fabrication process
  • What does reverse treated foil means, and how does it relate to the power layer?
  • Read Bert’s DesignCon Paper: A Practical Method to Model Effective Permittivity and Phase Delay Due to Conductor Surface Roughness

Links and Resources:

Connect with Bert Simonovich on LinkedIn

Follow Lamsim Enterprises Inc. on LinkedIn

Visit Lamsim Enterprises Inc. website

Read Bert’s Articles on SI Journal

Full OnTrack Podcast Library

Altium Website

 

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Transcript:

Bert Simonivich:

I came up with stacking of spheres, different arrangements, and a hexagonal arrangement, or what I call now, the Cannonball Stack, which is a different stacking of spheres. But if I know the height of the stack of spheres, of 14 spheres, I can figure out what the radius of a sphere is, and then the base area of it. And those are the two parameters that are needed for the Huray Model.

Zach Peterson:
Hello everybody, and welcome to the Altium OnTrack Podcast. I am your host, Zach Peterson, and I am here today with Bert Simonivich, of Lamsim Enterprises. Bert Simonivich is a well known signal integrity expert, and someone who I have cited in quite a few conferences and papers, and I'm very excited to talk to him because it's not very often that you get to talk to somebody who you have cited. Bert, thank you so much for joining me today on the OnTrack Podcast.

Bert Simonivich:
Wow. Thank you for having me, Zach. Nice to see you.

Zach Peterson:
Nice to see you too. We've chatted over LinkedIn a little bit and guys like you always keep me on my toes, so I appreciate that.

Bert Simonivich:
No problem.

Zach Peterson:
You are well known in the signal integrity community, as someone who has very eloquently explained stubs, and someone who's very eloquently dealt with roughness on interconnects, and then also on the plane, which I think people don't often think about, but maybe before we talk about some of your work in those areas, and any other areas, maybe you can introduce yourself for the viewers.

Bert Simonivich:
Okay. Thanks Zach. Yes, I'm a graduate from Mohawk College in Hamilton, and I've been involved with a lot of different things. I joined a startup after I graduated. We did my microprocessor systems back in the late '70s, and that lasted not too long. I got a job up in Ottawa, Canada, for Bell-Northern Research, and I stayed there pretty much my whole career.

Bert Simonivich:
It transitioned over to Nortel in the late '90s, and held a variety of engineering and different positions there. The end, I specialized in back plane design and signal integrity. I started more so specializing in that, and since then, I've been focusing mainly on signal integrity and started my own business in 2009, Lamsim Enterprises, where I do consulting now for clients.

Zach Peterson:
Do you consult in board design? Is it signal integrity? Is it a little bit of both? I mean, are you in the layout tool laying stuff out every day?

Bert Simonivich:
Oh no. I'm not PCB designer, per se. As I said, I graduated electronic technologist. Actually, when I first joined Bell-Northern Research, I worked on T1 line repeaters. My task, we had a small team, three of us, I started doing the actual layouts in PCB layout. I learned how to do that, and back then, there wasn't CAD, like we know today. It was, you laid it out with Mylar paper.

Bert Simonivich:
First did it with pencil, colored pencils, red and blue. Then you taped up the Mylar after, and took photo reduction. It was just two layer boards, and made the photo tools, what we call photo tools through the positives and negatives, to make the boards.

Zach Peterson:
So it's the analog version of photo plotting that we do with Gerbers.

Bert Simonivich:
Yeah, exactly. Back then, there were actual photo tool hard negatives and positives camera done. We did things in 2:1 scale and photo reduced to the actual scale itself. So that was actually a real good education really, because I learned about PCB layout and design, and that has helped me entirely through my career actually, to understand, the mechanics of PCB construction.

Bert Simonivich:
I still apply those same principles today when I do like back plain design, it's more at the architectural level, the high end, where I plan out all of the routing number of layers, how to route the tracks. But I understand the aspects of the PCBs and they have excellent CAD people, that was their job, eight hours a day to do layouts, so they're expert at doing it. So if you give them what you wanted done, they would just implement it and get done.

Bert Simonivich:
So it was helpful in that respect, but what I do now, it's a variety of things. Some clients call me up, ask me to help them with their design reviews before they tape out the board. They want sort of a last look or they've had some issues with some boards they've recycled several times, and sort of have a look at it and see if you can identify any issues. I found some issues with some clients that way. It was pretty good.

Bert Simonivich:
Not too much back pain, as I say, although back in 2013-ish timeframe, I worked with Viasystems, which is now... they've been bought out, PCB shop. And then right now the company that developed the XMX connector, it's now Amphenol. We did exploratory kind of back plane as a demo back plane, because they're going to introduce the XMX connector.

Bert Simonivich:
That was a successful collaboration actually. We developed this small back plane with a couple of daughter cards, and the nice size of it, it was portable, and it ended up being every design since then that platform was there. Mainly SerDes companies wanted to demonstrate their SerDes, because this was meant initially to be 25 gig compliant at that time, NRz, that's when the standards were coming out. So it was meant to have a stressed length, like 36 DB and then plus, to do things. So it was very successful that way.

Bert Simonivich:
So that was that part. So mainly now it's focusing on signal integrity. I'm engaged with a sort of a long term kind of client where I help consulting with them for high speed signal integrity on serial link stuff now. That's really what I focus on. That's sort of part-time with the week, and the other parts of the week, I continue my research.

Zach Peterson:
Your research focuses on which areas?

Bert Simonivich:
Okay. So my pet program, as you've identified is actually roughness of the copper, and its effect on the signal integrity. I started on that actually as a result of one of my early clients, wanted me to do a study on dielectric material comparisons, but they wanted to include foil roughness. At that time I thought, "Well, I'm just doing A to B comparison, what does roughness have to do with it?" But they wanted it anyway.

Bert Simonivich:
I didn't really understand the effects of any of it, so I started doing some research on it and applied what we had at the time, really the hammer stud kind of equations to things. It worked out all right, but it kind of sparked an interest, because once I got started with it, and the more you dug into it, the more you wanted to try and model it correctly.

Bert Simonivich:
I got into the Huray Model, but the Huray Model was difficult to use, although it was very accurate. So I started to research to find a way to come up with the parameters from data sheets, without kind of measuring because when it was first introduced, the idea was, you would sort of take SEM photos of the surface topography and try to estimate the roughness from there, and kind of put in the parameters. And if you had measured data, you would kind of tune the parameters to the measurements to get them to work out.

Bert Simonivich:
But if you didn't have the measurements, the Huray Model is pretty much useless, because people wouldn't know what to do. So anyway, I started trying exploring ways to perhaps do it, and I came up with stacking of spheres, different arrangements and a hexagonal arrangement, or what I call now the Cannonball Stack, which is a different stacking of spheres. But if I know the height of the stack of spheres, of 14 spheres, I can figure out what the radius of a sphere is, and then the base area of it. Those are the two parameters that are needed for the Huray Model.

Bert Simonivich:
I tested it out. I got some data from friends of mine, and I kind of worked on it from there, and when I tried it out, it worked out really well. But again, that was just one set of data. At least I presented it at DesignCon 2015, at the time. It kind of has been percolating ever since. So ever since, whenever I got more data, I was able to test it out and find out how well it was. It worked out very well.

Zach Peterson:
So when you have so many models like this, I mean, it sounds like you may have figured out the answer, but when you have so many models for roughness, how do you choose what is objectively the right one to use on the front end, before you've ever built a prototype or before you've ever done any sort of channel measurements. Do you have to rely on maybe, I don't know, manufacturer to determine that, or do you have to just get material samples, and do some kind of testing yourself?

Zach Peterson:
I'm wondering what's the best way, or are you forced to spin a prototype with maybe a test channel, and do the measurements correlate to the best model, and then say, "Okay, that's the model that's going to work with this board, with this process going forward."

Bert Simonivich:
There's two trains of thought. Some people advocate that's the only way that you would get it. It is a way, but I call that method Design Feedback Method, where you design a test coupon, and you build the coupon, do the measurements, VNA measurements, make sure you have good S parameters. Then you'd cross section it after, take accurate measurements of the thicknesses and actual the roughness and everything. And you'd tune your model to it, if you didn't have my Cannonball model, you would tune it to it.

Bert Simonivich:
So you'd end up with Dk/Df and roughness to put in, and you'd go from there, and you say, "All right, next time I make this stack up with this exact material in line with this space, I'll use these numbers." The trouble with that process is you get one board shop, they would build it, and they have different oxide or oxide alternative treatments they put on, and you don't actually know how well that is.

Bert Simonivich:
So sometimes depending on the process control, it can be good or can not be. Or if I have another fab shop, they use a different oxide alternative, one may be just an etching type, where it actually etches the copper. And that's the worst because it changes the actual copper profile, as opposed to just an oxide, which is non-conductive, it adds roughness, but the underlying profile doesn't change.

Bert Simonivich:
So if you did your characterizing with one board shop and then, you know how large companies go, they have purchasing departments, and want to go to cheaper board shops, they'll send it out somewhere else and get fabbed, and you get it back and surprise, you may have some issues. It's not what you expected. Actually, I've come across that with some of the work I've been doing with the clients. Every time we kind of build a new design, I put in test structures to kind of validate my model, which is good.

Bert Simonivich:
I found even with the same manufacturer was a different design, but the same manufacturer a year later, when I went under the microscope, the roughness of the foil was different, but it's the same laminate, same foil that's supposed to come. So you have tolerances on the foil itself, plus you have tolerances on the oxide treatments. So that's that process.

Bert Simonivich:
It takes a lot of time and money to do it. So why I develop my process is because I'm in consulting. I don't have access to do all of that. I don't have a VNA 50 or 60 gigahertz VNA to do the measurements, and take the time. I don't do the layout or everything. So I help clients, even at the front end of the design. I work with the architects when they come up with a new box. They have a new Serdes or new switch chip or something, and they're coming up with how it has to go. A lot of it is top rack pizza boxes, which are 19 inch rack mount. So you have a loss requirement from the chip to these modules, which you have to meet.

Bert Simonivich:
So you have to work with them and kind of build up a topology channel model of that structure, and see if that architecture's going to work. This Cannonball technique, I've dubbed my modeling method now, is it's a heuristic method. Heuristics mean it's not guaranteed to be perfect, but good enough to get there. And it's based on data sheet parameters, it's not just out of the air. It's a structured approach, you get the data, you put it together and you do the modeling. You can build a test board to kind of validate it, but at this point, I'm pretty confident it has been working out, and we put the test structure in on the other board, first prototypes, to kind of validate it.

Bert Simonivich:
For the most part it works out. Most of the time, I'm more pessimistic, then I get it, then the board comes in. And when I go under the microscope and I actually do the cross section measurements, and then put those numbers in, it then lines up perfect. Pretty good. So that's the loss aspect and why we do it in that respect. But then over the years, I've also realized the roughness affects the effect of decay of the material.

Bert Simonivich:
So we all know Dk is important for impedance control and all of that stuff, so the rougher the copper and thin dielectrics now, is why you get difference of your phase delay or even the effective decay that you would use in your model is because the thin dielectrics we need these days.

Bert Simonivich:
That's part of the research I've been doing on it, and it's always iterative. I'm always finding I'm learning a little bit new things as I go. Quite recently, last year was actually, I was talking with my friend Al Neves from Wild River Technology. He does test platforms. That's his business, signal integrity. We're talking about it, and explaining it to him, and we had some discussions, so I said, "Well, send me some data. I wanted to test my model out on some of your platform, you're working on." So he did.

Bert Simonivich:
When he sent me the thing, I noticed the stack up that he was using, one of the reference planes was a rougher copper than the signal layers, and to me, when I always modeled, I always made sure everything was the same roughness. So I never really thought about it too much until I saw this and I go, "Oh, that's different." So it was an excellent platform to test out the model with it. So the difference of the roughness of the planes factors in now, and you can see the difference in it. So it worked out really well.

Zach Peterson:
Yeah, and you have some signal integrity journal articles focusing on some of these points. So I invite anyone who is watching or listening to check out the show notes, because we will link to those articles, because I think they are a great read, and you definitely do a great job of explaining a lot of this stuff. One question that just came up, because you mentioned the oxide, I'll admit, I normally, when I look at this type of thing and doing any kind of, or building any kind of model around roughness, the oxide is not normally considered.

Zach Peterson:
Because you have mentioned it is non conductive, and I think there is a natural assumption that the roughness is on the trace, meaning on the conductive copper. So when you apply a correction factor, does that assume that all of that roughness is all on the copper or does it account for the oxide only, or is it a combination?

Bert Simonivich:
The way copper is used in many of the PCB, most of the PCBs today, are electro deposited copper. Electro deposited copper has two sides of the foil. They have the matte side, which is the side that comes out of the solution, and that's the rougher side. Then they have the drum side, which is the smoother other... Some people call the shiny side or whatever. That's the side that gets the treatment from the board shop.

Bert Simonivich:
The matte side gets treated with usually tiny nodules, and that's the side that gets bonded to the core laminate. So the core laminates that you buy, double sided copper core, has the treated matte side bonded to the dielectric. So that's fine. That goes to the board shop, they etch your patterns onto each side of that foil. Now, they build the stack up and they glue everything together with the prereg, but before they used the prereg or before they glue it together, they apply some roughening treatment to the shiny side.

Bert Simonivich:
So traditionally, there wasn't oxide treatment, it was just oxide was non-conductive but many suppliers, certainly in the US, had gone away from it. And then they have this oxide alternative, and oxide alternative actually etches the foil, and makes it rougher for adhesion. There's different chemistries that's used for it. That's the point is, when you roughen the actual foil, now the foil has this actual roughness to it, and it affects the propagation delay. Actually, the roughness add extra inductance as well to it, and makes your delay a bit more.

Bert Simonivich:
But that's what affects the loss, is that actual roughness of the foil itself. So that's what you don't know, what board shops what they use. And even worse is what number do you use for that? That's the hardest part. You can usually get from the laminate supplier, what the treated side of the foil, like an HVLP type foil, would have like a one and a half micron roughness on it, and use that Rz number, not RMS, it's Rz, that's what you find on data sheets. You apply that to my Cannonball, and it works out, but the other side is hard.

Bert Simonivich:
Each board shop has a different chemistry as well. So what I do is, in 2016, HD PUG, High Density Packaging User Group, is a kind of consortium of different companies, and they do research on PCB materials, and different issues. But they did a study on oxide and oxide alternatives in 2016, and they published a paper with that information. So typically, if I don't know, I will use sort of what the worst case number I got from that study. And it's usually not too bad, but if you do know, or if you kind of do research, and read other papers, other people have done other studies, actual measurements themselves, you kind of get a feel for all of that stuff.

Bert Simonivich:
So you kind of work in that range, but the higher speeds now, when we're going say to the 112 gig, perhaps, we may have to go to the non etch type kind of bonding. It's a chemical bonding where it doesn't actually roughen up the copper, but it's actually a covalent bonding to the material now. So that's maybe what we'll have to go to do.

Zach Peterson:
That's interesting. The reason I asked about the oxide is because if it is an oxide treatment, the oxide is non-conductive, but it does create roughness into the dielectric, and so the result is that you've basically got field confinement into a slightly smaller region in a dielectric. I mean it changes the dielectric constant.

Bert Simonivich:
Copper roughness; if you think of the teeth, they are conductive, and to get your fields, you need the electric fields. So if you have these points going in there, it's the actual points that are making the effective fitness less, right? Yeah, so it's the conductive one-

Zach Peterson:
That's what I mean.

Bert Simonivich:
That's the copper, it does that. That's what causes the extra higher decay, but the oxide that's non-conductive... If the underlying profile is still smooth, it's still okay. It doesn't change as much from your data sheet is what I'm getting at. And that's why the actual roughness of the copper is important.

Zach Peterson:
That's what I was getting at. If there's a difference between the copper roughness versus the oxide surface on top of it, does that make a difference? So I'm hearing it doesn't. Well, and it sounds like that copper oxide layer is going to be so thin compared to the dielectric anyway.

Bert Simonivich:
Yeah. That oxide is just like rust really. It's different property than the dielectric, but while I haven't done any real studies to know how much difference it is, but I suspect it's quite small because you it's really thin. Non-conductive, very thin. It's different than the dielectric.

Zach Peterson:
Exactly.

Bert Simonivich:
Certainly, I don't think it is huge. And this is only true for general dielectrics. The thicker the dielectrics the less effect the copper teeth or the roughness has on it.

Zach Peterson:
Yeah. And you had a nice, simple approximation for the effect on the dielectric constant, which I've always thought was very useful and you're right. It is a smaller effect when you have the thickness of the dielectric and the roughness more dissimilar.

Zach Peterson:
One thing that you had alluded to here was a worst-case number or a worst-case analysis, and so I'm wondering here, if you're going to develop a design process around this, where you're working with your FAB and you know that, “Okay, the tolerances on the copper roughness and the processing parameters are going to change somewhat over time as you mentioned and they'll also change from vendor to vendor,” if you can put some limit on an acceptable roughness that you would accept from a fabrication house, let's say, can you use that and say, “Okay, we'll accept this maximum amount of roughness and anything under that we're okay with,” and then model to that and use that worst-case for channel modeling?

Zach Peterson:
Do you think that's a good approach to try and at least get some sort of, I don't want to say consistency, but get some sort of standard by which you can design to?

Bert Simonivich:
That's sort of what I do when I do the channel modeling. That's why I use the [inaudible 00:28:32] numbers, because they seem to be maybe higher than normal. You don't necessarily get a range of things, so I typically would use those numbers and I'd build the channel model up.

Bert Simonivich:
If I met, the last budget at least, initially I say, “We're okay,” and of course we build the prototype and validate it as well to make sure. And most of the time it's a little better than I had predicted, which gives us even more margin, so I like to kind of work… I like to try to get a worst-case rather than a best case, because the best case, if you do things, you could end up in trouble.

Bert Simonivich:
But it's hard to get and if you stick with the same board supplier and work with them in the same material, over time, if you built structures, you build your own kind of database yourself and know, “All right,” this time you have some sort of statistics of that number and you could work with, right?

Bert Simonivich:
Certainly, it's there. I mean the foil itself, when you try to ask the laminate supplier of the foil, they only give you one number, but if you go to the board shop and they can get other numbers from the foil supplier that have some statistics associated with it. And for one foil that I looked at, published on their data sheet is 1.3 or 1.4, but statistically I got some data and it was anywhere from 0.7 to 1.6 or so, the statistical distribution, so that the mean was around 1.2 or 1.3.

Bert Simonivich:
So it was under what they had put in their data sheet, what they do, so it's okay. That tells me if I used the higher number, I would be all right with it, so I'm comfortable with this process. As I say, it's heuristic initially, because you get those numbers, have to start with something just like when you do your stack up, use the Dk/Df tables, use those numbers to do impedance prediction but actually when you get the board and measure it could be different because there's variation in that dielectric as well and the process from the FAB shop. So it all ties together. PCB, construction is complicated.

Zach Peterson:
Yes, it is. And I've been trying to make it my mission this year to learn more about the guts of the PCB fabrication process. It's something I think every designer or SI engineer, whoever you are, should definitely know about. But you brought up something interesting that statistical distribution on, I think it was Rz values that you were referring to. That's seems like a really broad distribution, right? I mean, you said 0.7 to maybe 1.6. I mean, I'm assuming that's two standard deviations.

Bert Simonivich:
Yeah, it was there. As I said, the mean landed at about 1.2 or 1.3 in about that range, which was under what they published on the data sheet anyway. And actually, when I did measure the one board, the roughness on the treated side was actually under a micron on that sample. That's why when I had measured the board, my prediction for that was worse and then when I cross-sectioned it and actually used the numbers of the cross section and put back in the model, then it brought it right back to what it should have been.

Bert Simonivich:
And if you had measured this board first, let's say that was my prototype, right, for this design feedback method, I would've said, “Oh, the R Z roughness is 0.8,” right? And if I use 0.8 in the future, I could get a board where it's 1.3 or 1.5. My loss would've been worse and my impedance would've been different. So yeah.

Zach Peterson:
Yeah. It almost seems like… Well, it doesn't seem, it sounds like a very time-intensive task because after the board goes through processing and it's a specific stack up, you've just said, you could measure one board and get one value for roughness but the true statistical distribution may say the mean is something higher or something like this. So you design to the low number and maybe you have too much loss or your channel falls out of compliance. I don't know what the result might be, but regardless you're designing to the wrong number.

Zach Peterson:
I mean, can a board shop maybe provide some more value specifically to high speed designers by, I don't know, taking their standard stack ups and measuring a hundred test coupons and getting maybe a more accurate number or is this just too much work for them and they just want to say, “Hey, SI guys, we don't want to deal with this. You handle it.” The laminate or the foil supplier said this, so we're just going to go with that.

Bert Simonivich:
The board shot might have done studies on the roughness of their oxide treatment. I'm just going to use oxide as a general term treatment. They might have got it or they don't necessarily want to share it with everybody, so it is kind of hard. What I ask them for is the actual cross section pucks [inaudible 00:35:07] that they do for the stack up, they send it to me and I've got my own microscope.

Bert Simonivich:
I got a good one last year, just for this purpose where I can do the measurements myself. So I get it. I'll do it myself that way, but it's hard. One thing I do know, as we go further and further into it, you need to work with your board shop from the beginning of your design. If you're planning a stack up, you can come up with your own preliminary stack up if you understand what it is, you have your own tools.

Bert Simonivich:
I do my own preliminary one, because I know how many layers I will need, how many power layers. So I'll do a preliminary one in the material I want and then I'll work with the board shop and hand it to them and they'll sanitize it for me and say, “Oh, no, we don't want to use this glass style because it's whatever,” because of their process. They need more resin in it. So they'll come back with something slightly different. They've adjusted the thicknesses properly for their process, the press thickness and then I'll run those numbers and we work back and forth and we agree on the stack up with it.

Bert Simonivich:
It's important to start early with your board shop and partner with them instead of going through the design and handing it over the fence and then they'll come back and say, “We can't build this,” then it's too late. So for signal integrity, if you're doing your modeling, you need to work closely with them. And when you do, then you can probably get the numbers you want from them working this way.

Zach Peterson:
Or at least you can prevent some double work because you're going to know a nominal Dk value or have the Dk/Df tables ahead of time. You're going to know the, let's say, the roughness that you can expect reasonably within some Delta ahead of time and then instead of waiting until the end, you hand it off to them and they say, “Hey, we can't build this stack up. This is what your Dk's actually going to be. This is the foil we have to use,” and then you have to go back and redo the modeling and make sure that whatever you're going to put into that modified stack up is still going to work.

Bert Simonivich:
Try to avoid double work. Exactly.

Zach Peterson:
Yeah, absolutely. I'm sure. I know clients don't like to pay for double work.

Bert Simonivich:
No, but when you've done all the homework upfront, your probability of first time success is greater. Obviously, there's little things that crop up.

Zach Peterson:
Sure. Yeah. Of course.

Bert Simonivich:
But there should be really no big surprise when you get your first prototype. At least that's what I found.

Zach Peterson:
Yeah. Okay. You've mentioned in the, we talked briefly about the roughness on the trace versus the plane, and how they can be different. I mean, is the difference just due to the foil type in one laminate versus the other? [inaudible 00:38:40].

Bert Simonivich:
Sometimes when you build a stack up, you have your core laminates where you have the traces on one side and if it's a reference, plane is on the other. So it'll be a ground and a signal layer on it. But when you laminate it to another core in between the Prepeg, when you're near a power layer, say you're near the center of the stack up, that power layer might be thicker material.

Bert Simonivich:
And generally people say, “Well, that's not high speed. It's just power,” so they may use a rougher copper or a reverse treated foil and reverse treated foil means the mat side now is the side that gets bonded to the Prepeg and the shiny side is treated and gets bonded to the core. That's what reverse treated foil means.

Bert Simonivich:
What that means is now you have a reverse treated foil for the power layer, which is actually the ground to your strip line, but that's rougher now, the reverse treated foil. And that's where you have to really watch if you have high speed and it's near where you have a power layer, which is the ground of the power pair.

Bert Simonivich:
Usually, you have a power and ground sandwich in a core, and you usually put the ground as a reference to the signal layer. So that's one application where you could end up with the two different roughnesses and another application is in HDI design, High Density Interconnect packaging, where you're actually building up now every layer with Micro-vias now. So when you're building up, you're putting in the Prepeg and then your board shop is putting the foil on it, much like in standard PCBs where the outer layers, the board shop puts that foil over on the Prepeg.

Bert Simonivich:
Usually that foil is rougher for peel strength or whatever, so if you don't specify that foil, you could end up being rougher in a buildup. HDI designs as well. All I'm getting at is when you do your stack up, you just have to be cognizant of this effect and understand that roughness matters and where you put your high speed looking at things on it. Yeah.

Zach Peterson:
Yeah. This is interesting. And we've been talking about taking a value from, whether it's a statistical value that you determine yourself from distribution or whether it's a number provided by the foil manufacturer, whoever gives it to you and doing that for prediction. But there's another set of techniques that involve…

Zach Peterson:
Well, actually the one that I know of best is, it's not really a regression technique, but it's a genetic algorithm technique that intends to extract a roughness correction factor as a function of frequency and then taking that, turning around and using that in prediction and so the idea being that it's essentially model free. It's just extracted directly from measurements.

Zach Peterson:
There's this one paper from 2009 where they apply this technique to S-parameters to get all the parameters in the transmission line and then you could add in roughness as one of those parameters, so you get a roughness profile versus frequency. I mean, what are your thoughts on that or are you an advocate of, you need to just determine the roughness parameters directly from some measurements or from statistics?

Bert Simonivich:
Well, I'm not familiar with what you're talking about. I do know that the modeling tools have certain roughness models included in them, so you really have to put in parameters for that roughness model for the [inaudible 00:42:56].

Zach Peterson:
But what I mean is those models are analytical.

Bert Simonivich:
They apply it to the conductor part of the roughness because or loss, because your loss has got dielectric loss and conductor loss, and of course there's a skin effect we all know about and that's just normal, but the actual roughness now adds more loss to it. The Hammerstead had a simple correction factor. It's just an equation that they apply and they apply it to the actual conductor loss itself, S parameter and it just adjusted it, corrected for it.

Bert Simonivich:
The Huray model is the same thing only it's a little more complicated. It needs the two parameters from it. So either way you need a correction factor to apply to your thing. Your S parameters, you can't just apply a number to that because it's a combination of dielectric and [inaudible 00:44:13].

Bert Simonivich:
Before these EDs tools, EDA tools had the Huray model in. I had to break it down. In fact, my 2015 paper was virtually analytical where I applied it to the copper part of it and then the dielectric loss and combined them afterwards but you have to apply it to the conductive part so yeah, I'm not familiar with what you were describing.

Zach Peterson:
Well, what you end up getting out of that is basically a table of values, which is copper loss versus frequency, and so it lumps together a roughness factor and skin effect, skin resistance. And the skin resistance, you can factor out because we know it's dependent on square root of frequency, so you can factor that out and you're just left with a…

Zach Peterson:
Think of it as just a table of values. Column A is frequency, column B is roughness correction factor. So if you had that data, does that provide any more value or is that really just an extra analytical step that forces you to go right back to taking roughness better?

Bert Simonivich:
I don't know but if you guessed some number, how do I now apply it to anything, is what I'm getting at?

Zach Peterson:
I mean, because in the Huray model, like you said, you can calculate a roughness correction factor, but if you could instead extract that from measurements as a function of frequency, instead of calculating it at every frequency and then turn around and use that data to then predict another type of transmission line that's-

Bert Simonivich:
[inaudible 00:46:00] those numbers into a model. You're going to get a model, you're going to get these numbers out of something. It's a nice table, you've got this loss, but now how am I going to take those numbers and put it into a tool to do modeling? I don't know how to do that. And you know-

Zach Peterson:
Yeah. You'd have to write something custom to do that. Yeah. No, I like that perspective because I ask this sometimes because you see these techniques sometimes in academic papers and this particular one was an IEEE paper, but it's academic paper and sometimes those things don't scale very well. They're very nice conceptually.

Bert Simonivich:
It is but the nice thing with academic papers are, initially, they show things, but if you read some academic papers, they may spark some other idea. And they do have value. I mean, let's take the Huray model for instance. When they came out, there was an academic paper, I think 2008-ish or 2009-ish first presented IEEE things and had a lot of mathematical theory and it was physics-based and the whole bit.

Bert Simonivich:
He developed this equation to apply to it, but again, nobody… You could now use this in a tool and tune what you said, but your tool would have to have some properties in it, so you tune these things to make it match. It did end up being eventually practical because now they have included in actual EDA tools. For instance, Altium uses the SIMBEOR engine underneath now and SIMBEOR engine has Huray model under it.

Bert Simonivich:
So the nice thing about my Cannonball arrangement is even though the SIMBEOR doesn't say Cannonball per se model, it still uses Huray. And my Cannonball part gets you the parameters to feed into Huray even. So some tools have Cannonball-Huray directly where all you put in is Rz number and it works under the hood and gives you the thing. Other tools ask for Huray but the Cannonball method, it gives you the radius, what you need and it gives you the area, what you need, and the number of spheres is always 14.

Bert Simonivich:
And the nice thing about the Cannonball simplification, I call it is some tools just ask for Sr and R, so Sr will always end up being a constant because things cancel out with it. So all you're left with is a radius needed. And the Cannonball method is 0.06 times Rz, gives you the radius that you need, and there is a constant. So SIMBEOR the constant for… They ask for a constant, there's one number, other tools it's another number because it uses a different part of the equation.

Bert Simonivich:
But my 2019 DesignCon paper it's on my website, it goes in there. I've got a table in the slides showing these tools use Cannonball-Huray directly, SIMBEOR would use this and it gives you the constants to use. So it's actually quite simple. My Cannonball-Huray method is the simplicity of the old Hammerstead method, where it just asked for the RMS number, but it gives the accuracy of Huray.

Bert Simonivich:
So if you're used to using the Hammerstead, the Huray, this method will find it get more accurate. So I encourage people, if they're interested, they can go to my website. I have publications on there, the DesignCon papers, and plus how it was all derived early on. You can follow the papers and find the history but the latest one on there is more practical now for people to use. It's quite good, actually. I'm quite happy with it.

Zach Peterson:
That's excellent, and we will definitely link to your website in the show notes, so I encourage anyone who is out there listening or watching, please head on over to Bert's website, check out those papers and learn as much as you can about this important topic.

Zach Peterson:
I think we're going to leave it there for now, but I want to thank you so much for coming on to the podcast. This is a treat for me, because as I said earlier, I've cited you many times and I have other work that I'm doing hopefully to submit to DesignCon for this year myself, where I am citing our guests.

Bert Simonivich:
[inaudible 00:51:26] Zach.

Zach Peterson:
As I said, a real treat for me. Thank you.

Bert Simonivich:
One day we'll catch up. If you're going to DesignCon next year, hopefully I'll be able to get out there. I missed two years now, so hopefully January we'll be able to get together. Wow. I don't-

Zach Peterson:
Absolutely. I don't drink, but I'll buy you a beer.

Bert Simonivich:
I don't drink very much anyways anymore, so doesn't matter.

Zach Peterson:
That's all right. Then a Pepsi or something. Thank you very much again for being here, Bert. Everybody, this has been Bert Simonivich from Lamsim Enterprises, signal integrity expert and I encourage you to check out his website, check out his DesignCon papers, learn more about all of these important aspects of high-speed design.

Zach Peterson:
With that, make sure to subscribe to our channel, hit the like button and you'll be able to see all of our upcoming podcast episodes as they come out. Last but not least, don't stop learning, stay on track and we'll see you all next time.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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