System Level Qualification in Simulation

Zachariah Peterson
|  Created: March 28, 2023  |  Updated: April 18, 2023
System Level Qualification in Simulation

In this OnTrack episode, we are very excited to bring you Tim Wang Lee, a Signal Integrity Application Scientist and the High-Speed Digital Application Product Manager at Keysight.

Tim will share his early days as a prodigy with Dr. Eric Bogatin. We will also discuss the importance of simulation and measurement to achieve signal integrity for your PCB design.

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Show Highlights:

  • Tim Wang Lee Introduction
  • Tim talks about Dr. Eric Bogatin as his mentor, his knowledge about simulation and signal integrity especially rule number nine
  • A favorite phrase GIGO (garbage in garbage out) according to Tim is his way of understanding his intentions and asking questions before diving into a project
  • Tim with Mike Russo, initiated simulation and measurement workflow seminars and webinars to help educate the importance of measurements and simulation to back it up
  • What is a Virtual Prototype?
  • Where to start with a system-level qualification in simulation?
  • Tim explains what an EP Scan (Electrical Performance Scan) does
  • Keysight is also now focusing on Power Integrity and Heidi Barnes is one of the leading experts in the Power Integrity ecosystem
  • The next step for Keysight is to aid PCB designers in not only generating results but also fixing the issues

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Transcription:

Tim Wang Lee:

Whatever happens in the physical world, you can have a model for it in the simulation of the virtual world. That means the better troubleshooting and better future development, you can future improve your products and then you can help future development as well.
 

Zachariah Peterson:

Hello everyone and welcome to the Altium OnTrack Podcast. Today, we'll be talking with Tim Wang Lee from Keysight. Tim Wang Lee is Signal Integrity Application Scientist and High Speed Digital Application Product Manager with Keysight. I think this is going to be a very interesting discussion. It's been a while since I've talked to Tim and so I'm very happy to have him on the podcast today. Tim, thanks so much for joining us.
 

Tim Wang Lee:

Well, thank you Zach for having me.
 

Zachariah Peterson:

Absolutely. I know we last talked, well, actually let me take that back. I see you on LinkedIn often and I see your name on Signal Integrity Journal articles sometimes and I know we had a first talk at EPEPS a few years ago. So maybe if you could, introduce yourself to our audience and tell them what you do at Keysight.
 

Tim Wang Lee:

Well, hello everybody. My name is Tim. Some call me Dr. Tim because in 2020, I finished my six year PhD adventure with the great Dr. Eric Bogatin, on signal integrity. My thesis focused on the simulation and measurement, the dance between simulation and measurement and that's what I've been doing lately is to spread the knowledge and the tips. And I think that's where we met. I was talking about one of my thesis projects extracting the printer circuit board parameters from measurements.

Zachariah Peterson:

Yeah, you were doing a demo and model extraction was actually one of the big themes at that conference and it's actually been kind of a long time theme and even one of the papers I had cited in the past dealt with model extraction, so I know it's a pressing topic. You said it took six years to complete your PhD. Is that because Dr. Bogatin is very rigorous?
 

Tim Wang Lee:

Well, and don't tell him I said this because I would say halfway through we ran out of funding, so he told me to get a real job. That's why I started interviewing with Keysight and so I had to do my schoolwork and my application engineer's job. That's why I took a little longer.

Zachariah Peterson:

That's understandable.

Tim Wang Lee:

Great experience though.

Zachariah Peterson:

Oh, of course. Anytime you can jump into the workforce before getting that degree, then I think it's great to get that experience. I actually personally, that's something I missed from my experience, so I kind of wish I would've done that. So a aside from that remark about Dr. Bogatin, tell us what it's like to be in his tutelage and maybe be nice because he's probably listening.

Tim Wang Lee:

Hey Eric, Dr. Eric if you're listening, well thank you for everything. All the things I've learned, especially rule number nine, never perform a measurement or a simulation without knowing what to expect. That is one big thing that's changed my life really and my career. Based on that, I started all my engineering that way. That just gives me a great first step to any engineering problem I can have. As a advisor, he was great at asking questions first and seek to understand where I'm coming from instead of just straight up giving me the answer. And that's the key. We all need time to find our own way and find our own solution. There's no one size fit all to a career path really.
Speaking of technology and speaking of different ways you can solve one problem, it's all like that. And I'm just glad he was able to give me the freedom to learn on my own and be strict on me when my presentation wasn't tied up, he was telling me, "Nope, it's not there. Go back and do it again." I really appreciate those times. That really made the person I am today and I model a lot of my deliveries and my communication after him and some would say I'm the rising star and I take after him. And thank you for the audience who is thinking that.
 

Zachariah Peterson:

Well, and speaking of asking questions before actually jumping into a simulation, that's part of the really important pieces of the workflow if you're going to do any kind of simulation for an electronic system, isn't it?
 

Tim Wang Lee:

Exactly. I think one phrase we like to use is GIGO, garbage in, garbage out. Your result is only as good as what you put in. And by asking the right questions from the get-go, it will get you into the right mindset instead of pressing all the button at once, you'll have a more educated approach and more targeted approach to your simulation. Any person can really press a simulate button, but not everybody can interpret and troubleshoot from a simulation results. So it's like you said, it is a very crucial step in a simulation or even measurement to have the right question asking upfront and to know what to expect.

Zachariah Peterson:

That's a good point. You bring up measurement because I think if you've gone through a formal engineering program like at a university or even a hard sciences program, they always kind of drill that into you that you should have a hypothesis before you do an experiment and it requires a bit more understanding about what's going on in that system in order to be able to predict what you're going to see. And I think maybe you could say one of the problems with simulators is, like you said, it makes it really easy to just start hitting buttons and if you don't do that homework ahead of time, how do you even know if what you're seeing is valid?

Tim Wang Lee:

Exactly. And that's the value of being knowledgeable in a field, knowing what to expect. That's step zero into the simulation or measurement.
 

Zachariah Peterson:

So how a little sidetrack here that I'm actually curious about. How did you actually get into or develop an interest in signal integrity and simulation?
 

Tim Wang Lee:

The truth is I was really interested in monolithic microwave integrated circuit. When I went to study in University of Colorado, in Boulder, it was Zoya Popovic. She was really one of the best person in the field. And I was interviewing, I got into the University of Colorado, but then since I'm a non-citizen of the US, it was very hard to get funding into the government projects that requires designing of the power amplifier, the PAs and all the project.
So the funding was a problem and didn't look like a path that I could go down as a career. Then Eric showed up in I think 2012 looking for a research assistant and I said, "Okay, I can do that." And one of the interview question actually going circling back, full circle, my first interaction with Eric was the dance between simulation and measurement. How I was designing a, I think range coupler or some sort of coupler in ADS, one of Keysight's software tool and we were using a Mealy machine to mill out the coupler and were comparing why simulation and measurement of the coupler is different. So it's the okay, you simulate and you measure and you look at what's been measured and include what was in simulated into the simulation again, and that back and forth.
 

Zachariah Peterson:

Okay. So kind of happenstance of getting into signal integrity.
 

Tim Wang Lee:

Exactly.
 

Zachariah Peterson:

So I'm sure the experience with signal integrity at the university level and then getting into your job at Keysight, they really play into each other because Keysight has solutions both for SI simulation as well as test and measurement, and so you really get to see those worlds collide.
 

Tim Wang Lee:

Exactly. And that's why actually Mike Russo, he's a friend of Eric's, Mike and I, we will do these simulation and measurement workflow seminars and webinars to propagate this idea that Keysight is great at both doing simulation and measurement. And at a more fundamental level, we want to educate the masses that it's not only important to do measurement, but it's also important to have simulation to back it up. They kind of support each other.
 

Zachariah Peterson:

Well, I would agree. Especially with PCB design. I think if you start with a design and you can do some kind of simulation on it, whether it's in your layout tool or an external 3D field solver or something, you at least have a baseline for what you might expect to see in your measurements. So you're kind of validating whether your measurement process is even correct at that point. Is that the right way to think of it?
 

Tim Wang Lee:

Yeah, the one way it is, one validates the other and you always need some benchmarking to know if what you're doing is making sense.
 

Zachariah Peterson:

So you mentioned just a moment ago that you would do some webinars on simulation and I think test workflow. So tell me a little bit about what that workflow might look like, whether it's with Keysight products or disparate products, in order to accomplish both test and simulation in a really coherent matter. I've worked in research labs and stuff and I think it's easy to see a situation where people kind of go off into their test and simulation worlds and don't really work close enough together to then figure out whether they're doing anything correctly. You have that garbage in, garbage out problem.
 

Tim Wang Lee:

Exactly. I was thinking about a saying where I think everybody believes the measurement except the person that took the measurement. And the same thing goes for simulation. Only the person that performed the simulation trusts the simulation. Everybody just went, "I don't trust your simulation." And your question is for the workflow, it usually starts with the schematic level. On the very left-hand side you have your schematic, then probably board layer layout. Then you get into these layout level stimulation. And after that, you move into physical prototype. Then you have measurement.
What the top level workflow would look like is to have some virtual prototype in simulation. So then in the middle, you have virtual prototype. Then at the very far end, once you have the physical prototype, you can compare and contrast these two. That means whatever happens in the physical world, you can have a model for it in the simulation of the virtual world. That means the better troubleshooting and better future development, you can future-proof your products and then you can help future development as well.
 

Zachariah Peterson:

So when someone usually says virtual prototype, I think it sounds kind of like a very techy buzzword that someone might throw at a VC who's trying to get some investment. Maybe if you could, make it a little tangible, what exactly is a virtual prototype?

Tim Wang Lee:

That is a good question. A virtual prototype. I would define it as a representation in software, what you're going to make in hardware.

Zachariah Peterson:

So this would be the board, it's assembled components, whatever the critical structures that you have identified in the layout or in the assembly that could then produce some sort of skew or error in your test results if you don't account for them.

Tim Wang Lee:

Right, exactly.

Zachariah Peterson:

Okay. So CAD tools are kind of uniquely positioned to let you go through and select what to include or what to exclude in whatever model you export before you go into maybe a more high power simulator.

Tim Wang Lee:

Right. A CAD tool is a excellent example of a virtual prototype world. It is a necessary and very important role in the design cycle.

Zachariah Peterson:

I think CAD vendors, and this is not any fault to anyone specific, but CAD vendors do not often use that term. So when a simulation vendor starts saying virtual prototype, they think, well, what is that?

Tim Wang Lee:

There you go.

Zachariah Peterson:

Yeah. It's kind of like when people started using digital twin.

Tim Wang Lee:

Exactly. Well, a design is only a design, but it's what you do with a design. A design can be turned into a virtual prototype if you are in a simulation environment.

Zachariah Peterson:

Sure, sure. So you mentioned on the left-hand side of your workflow is the simulation. So where do we start if we're going to do some sort of system level qualification in simulation, starting in the schematic. What are the first things that someone would need to approach?

Tim Wang Lee:

I'm going to take high speed digital channel. For example, you have your transmitter on the very left-hand side and the receiver and the channel in between. That's where you would start on a schematic level. You plop down a transmitter and receiver and some sort of channel model in a schematic. And you simulate it, you look at how the loss of the channel look like, the eye diagram, all the signal injecting metrics. That's step number one.
Then from there, you can start looking at, okay, now there's going to be the receiver has to have a realistic representation. These are the IBIS models. Then you have the TX also needs some realistic device models. And in the middle, instead of just a model transmission line, you have the real path in your printed circuit board being extracted.,Going back to what we were saying, extracting the model. That goes down stream that way.
 

Zachariah Peterson:

So when someone says extracting the model and bringing it back into a schematic, I take that to mean we have different structures that we have designed into a circuit board. We develop some sort of network, like two port network model, let's say for those different structures, and we put them into a schematic and that allows us to maybe mix and match some different things by connecting them together in a network. So I could take my, I don't know, three inches of transmission line, pair it up with let's say some blind via layer transfers and then really qualify if my receiver is going to be able to interpret the digital data that gets sent down that transmission line.

Tim Wang Lee:

Exactly, exactly.

Zachariah Peterson:

Okay. So this is really the first stage of qualifying some constraints I guess that you would want to put into the PCB layout. Is that the right way to think of it?

Tim Wang Lee:

Yep, exactly. And usually, speaking of constraints, with the eye diagram you have, eye masks. With S parameters, you do have these, what do you call them? They are-

Zachariah Peterson:

We have lost budget.

Tim Wang Lee:

And lost budgets. Masks really in general, the masks.

Zachariah Peterson:

Right, right. I never use the term masks with the S parameters. I mean, coming from RF, we always go with loss budget.

Tim Wang Lee:

Oh, okay. That's cool.

Zachariah Peterson:

Yeah. Okay. So once you get into the layout, I mean obviously as Eric says, because we've had him on the show before, the layout exists in the white space of the schematic, I think is how he says it. So all of the SI stuff that isn't related to whatever the transmitter and receiver are doing occurs because you did something in the layout to screw things up.

Tim Wang Lee:

Yes.

Zachariah Peterson:

So once you're in the layout, what are you doing with simulation at that point? Are we doing all full electromagnetic simulations? Are we relying on 2D cross sections for boundary element? What level of simulation do you need to get into in the workflow with a simulation based workflow as you get into the layout and you're still trying to get to the point of having a prototype that is ready to be turned into a physical device?

Tim Wang Lee:

The short answer is it depends on your requirement of accuracy and how close the deadline is. If you have the time, you can always do a full board 3D EM simulation. That's going to take hours if not days, to set up and simulate. If you don't have the time or you want something quick and simple, there are other ways you can look at the layout and just net by net basis. So there are many different venues that you can do. Keysight has several different product lines that does different things, all the way from my recent product, shameless plug, electrical performance scan. That does a layout level simulation net based to ADS SI pro that does 3D EM, then to do EM Pro, EM design, that is arbitrary 3D. So there are different levels of simulation you can do.

Zachariah Peterson:

So on a net by net basis, if you're trying to save time, you probably need to learn how to diagnose which nets are going to be the problem nets. Would you agree with that statement?

Tim Wang Lee:

Yes and maybe. It depends on who you are in the design team. If you are a hardware engineer, you're not equipped with that much SI knowledge. So you can probably perform the simulation, but it will be somewhat difficult for you to diagnose and say, okay, this is what's wrong. But if you are the SI engineer, you'll be able to not only simulate it, but also to catch the problems. Now, the business problem is you have fewer SI engineers than hardware engineers and there's some verification bottleneck that needs to be addressed.

Zachariah Peterson:

Well, if there's a verification bottleneck, I think that plays back into the overall design workflow because within that design workflow, you probably don't have time to do a ton of qualification and constraint development on the front end, if you're one SI engineer on a team of five hardware people. So would you advocate for just letting the hardware folks do their thing and the SI engineer has to come back and pick out things by eye and spot which nets they really need to focus on for simulation, or is there a better way to do it?

Tim Wang Lee:

I don't believe in the throw it over the wall and my job ends at my job description mentality. I was telling Judy Warner that. So I believe to empower the hardware engineer to do a little more, hence the birth of EP scan. And a lot of, I believe layout, CAD vendors also have integrated simulation functionalities within the tool to help facilitate the simulation process when they're in the layout, layout simulation environment instead of having done the layout and only let the SI engineers do the job of simulation.

Zachariah Peterson:

Yeah, there's two sides to that, right? There's the setup and then there's the presentation of the results in such a way that I can formulate an actual course of action. And I think people have trouble on both sides. I think the CAD vendors attempt to do a really good job of the presentation of the results. I think sometimes it's the setup that confounds people a little bit because maybe you have to attach a model to a component. I know that in some simulators you have to pick a logic family, you have to program in a stimulus, it's not all built in.

Tim Wang Lee:

No.

Zachariah Peterson:

So what are companies like Keysight trying to do to help speed that up? I think you mentioned like EP scan is one of those tools that you have.

Tim Wang Lee:

Right. EP scan drastically lowered the barriers to entry. There's no port set up that needs to be done. So we really empower the hardware engineers to have SI simulation results and to see and to identify what's possibly wrong. They don't have the level of SI pro where if you do have the time you want to learn more, you are free to set up. You don't have to spend the time to do the port setup because we know it's high speed digital nets, we can make educated guesses on what's the best for you. Then when you move on to the arbitrary 3D level, then all gates are open. You can do as many things as you want. But the problem comes with that is, well, when something goes wrong, there are more things to check.

Zachariah Peterson:

Something going wrong in a 3D simulation that takes hours to complete, that's annoying.

Tim Wang Lee:

Yes, yes.

Zachariah Peterson:

I've had to deal with it with antennas and trying to iterate through geometric parameters with antennas and then antenna arrays because once you get to an array size, you're talking, like you say, 24 hours for a simulation.

Tim Wang Lee:

Exactly, exactly.

Zachariah Peterson:

But I've never had to do that kind of a big of a simulation, I guess, with high speed digital. What makes it different when you start doing high-speed digital, especially during the setup?

Tim Wang Lee:

They're 3D level, board level. But usually boards size are constrained, but it's about the models. We have a lot of customers, they want to do different parameter sweeps on different finite... FAE tabs to correct for the equalizations. So then they have to sweep a lot of different values, and that's when you need high performance computing and you need a lot of parallelization of the simulation.

Zachariah Peterson:

So this is really fine-tuning a channel for not just the bitstream that it needs to send and receive, but also for the physical environment where it's located. Because there could be parasitics that alter the ideal behavior that you set up inside the schematic.

Tim Wang Lee:

Right, right.

Zachariah Peterson:

Is there any way to account for that at the schematic level and maybe get some of that homework done ahead of time, or does that just require extremely complex circuit models that are just not feasible to extract from a layout?

Tim Wang Lee:

Well, that's a good question. I think people usually start with the reference design. Then they will go from there. I think we're talking about the capacitor level parasitics and all that. That really have to be captured in electrical mechanism simulation, EM simulations.

Zachariah Peterson:

Yeah, because it's that capacitance and mutual inductance between other structures in the layout that can really catch you off guard. And I would imagine, if there's some way in the schematic where you can at least develop a constraint based on a simulation, then on the backend when you get to the 3D level, you're really reducing the number of 3D simulations you need to run. It's like trying to reduce the number of prototyping runs.

Tim Wang Lee:

Right, right, right. Yeah, that'll also be good.

Zachariah Peterson:

Yeah, it would be really interesting to see that. And then one thing that I know is very pertinent and always has been in the SI world, is the relation to power integrity.

Tim Wang Lee:

Yes. Power integrity is also a big thing, Keysight's focusing now. And I think you've talked to Heidi Barnes, she's one of our leading experts in the power integrity ecosystem. It's no longer just a simulation, it's connecting the power supply to these parasitics we're talking about and the models. And what makes things more complicated is with these switch them out power supplies, there is a feedback loop. So it's no longer just a simple one size fit all simulation, it's you have to first find your EM parasitics, then make sure you have correctly identified your power supply models in a behavior model. Then you have to set up the correct stimulus and correct data result display so you can see the necessary effects in the right way.

Zachariah Peterson:

Yeah. We were talking with Steven Sandler not too long ago. It was actually before DesignCon. And he was bringing up some points about power integrity and specifically VRM design, which I think I was only passively aware of because most designers know there's that FB pin on their switch mode, regulator controller. Yeah, it's for feedback. But what does it actually do to the power that gets put out, and then how does that affect SI?

Tim Wang Lee:

Right.

Zachariah Peterson:

Sorry, go ahead. Go ahead.

Tim Wang Lee:

I think you're going to where I was going, is the solution between PI and SI, and people call it the power aware. I don't think we're quite there yet. They are use cases that is enabled by Heidi's hard work and Steve Sandler's hard work. But coupling SI and PI simulations hasn't been our driving... What's the word I'm looking for? Our driving advancement development here.

Zachariah Peterson:

Yeah, that's what I was going to ask, is it on the roadmap?

Tim Wang Lee:

Anything, everything is on the roadmap, am I right?

Zachariah Peterson:

It would be very nice to be able to get some sense for how some of those issues that Steven brought up and that Heidi and I have talked about as far as power integrity, really telegraph onto the signals that are being output. Because you can co-measure them in a board that has a power integrity problem, which leads to an SI problem. Right?

Tim Wang Lee:

Exactly.

Zachariah Peterson:

I need two probes. I'm just measuring two points and looking at the correlation. But I think it's much more interesting to be able to really predict that at the system level first.
 

Tim Wang Lee:

I would agree. As an engineer, I would totally agree, but a lot of times the business development is another issue. They want to see us bring in enough dollars to push for the investment for the extra R&D engineers and to develop the solutions. It's very tricky when it comes to business. I want to have them all, but you just can't.

Zachariah Peterson:

That's fair. It would be really cool to have a system that sets up that stimulation for you based on results and some constraints that you define as the designer. It can then go back and optimize the PDN topology to help you get those targets.

Tim Wang Lee:

That would be awesome.
 

Zachariah Peterson:

Yeah, that would be cool. Well, I guess we can all dream, right?

Tim Wang Lee:

I can dream.

Zachariah Peterson:

Yeah. Well, so going back to power integrity, I asked Heidi about this and I'll ask you about it because it is a design point that is actually a bit contentious when it comes to the simulation. Fair rights on the power rail, yes or no, and how do you simulate it?
 

Tim Wang Lee:

You know what? I have to premise... I have to say, no, I can't answer that question. I don't have in enough expertise to answer that question. I would defer that to Heidi, really.

Zachariah Peterson:

Well, Heidi grave gave a great answer, which relates back to some of the things that we talked about with SI, and especially with simulation is the simple model I think that you use, which is like the RLC model is not that accurate, frankly. It's easy, but it's not accurate. And then that creates, I think, the garbage in, garbage out cycle that we get with power integrity simulation sometimes. So in terms of model extraction, going back into the system level with simulation, how are you doing that model extraction, whether it's for components, small devices, under tests or transmission line? Is that only coming from the 3D simulation side? Is it coming from measurement? And how do we address that and what systems are used to get those models that we can use at the schematic or system level?
 

Tim Wang Lee:

Generally speaking, the models we use are behavioral models that are represented by S parameter matrices. And the S parameters can come from, like you mentioned, EM results or measurement. And sometimes we're using both, because with the EM simulation, you won't be able to capture some of the fixtures, the connectors. So you'll mix the EM results, the board level results with the connectors, so then you'll get a holistic view of what's going to happen when you actually hook things up.

Zachariah Peterson:

So you said you can't capture the connectors in a 3D simulation. I would think, or I think someone would think that you should be able to capture connectors in the EM simulation.

Tim Wang Lee:

Yes, yes, yes. And when I say 3D EM simulation, I was thinking SI pro more of a targeted application, not an arbitrary 3D. Arbitrary 3D, yes, you can definitely simulate a connector. That's a good point. Yeah.

Zachariah Peterson:

Okay. So you'd have to have the system mesh onto that entire connector and then it could do it.

Tim Wang Lee:

Exactly, exactly.

Zachariah Peterson:

That's probably one of those 24 simulations.

Tim Wang Lee:

Oh yeah. Yeah, yeah.

Zachariah Peterson:

But I suppose once you have each of those little pieces of the simulation, you have the line, connector A, connector B, whatever that signal launch or transition is, then you can kind of go back into the system level and mix and match those structures.

Tim Wang Lee:

Yeah. And if you are ambitious enough and you have enough money to burn for a server farm and high performance computing licenses, by all means, you can match the entire board, 16 layer, 32 layer, what have you, with the connectors nicely mashed and just let it rip. Hit simulate, and hey, go take your vacation, come back for the results. Right?

Zachariah Peterson:

Yeah, you could probably set it up remotely now these days.

Tim Wang Lee:

Hey, there you go.

Zachariah Peterson:

Yeah, be on the beach in Tahiti, setting up your simulations.

Tim Wang Lee:

We're technically simulating.

Zachariah Peterson:

Technically, yeah. Don't tell your bosses that, I guess.

Tim Wang Lee:

No.

Zachariah Peterson:

So we've talked about a couple of things that I think are on the roadmap, and I know you'd like to see everything on the roadmap. What is coming up though to help PCB designers who maybe aren't so SI savvy because frankly they're solving layout puzzles every day. What's on the roadmap from Keysight to help those folks?

Tim Wang Lee:

From my perspective, as a high speed digital applications product manager right now, electrical performance scan, EP scan is doing really well in helping PCB designers. Our next step is not only to show you the results, but to show you how to fix these problems.

Zachariah Peterson:

So when you say tell you how to fix the problem and the design, I would imagine that this is almost like a rules based or rules checking kind of situation where the result is probably due to a set of let's say 10 things, and the system looking at the layout is able to automatically exclude, I don't know, seven of those things, and it really narrows it down. Is that kind of the approach?

Tim Wang Lee:

And we take also the intelligent approach where you can look at, so two examples. One is the via residences will be able to look at how deep the via were drilled, where the via step would be located. Then based on the length of the via and rule of thumb calculations, we can give you an idea on what the resident frequency would be. That's number one.
Another one that's highly requested is the return path discontinuity. In EP scan, we have a very intelligent signal reversal and discontinuity recognition algorithm that actually return the location and the layers that are missing from the simulation that will help you locate the return path discontinuity. So you can actually go back and put in the return path.

Zachariah Peterson:

So is this something that is like visual? Is it cross probed? So it lists a coordinate, you click on it, it zooms.

Tim Wang Lee:

It's going to be visual.

Zachariah Peterson:

What's the easiest way to flag that for a designer?

Tim Wang Lee:

We are still exploring that. And for a designer, the cross probing would be ideal, but it comes with Keysight having the access to the layout program they're using.

Zachariah Peterson:

That's a good point.

Tim Wang Lee:

Yeah, it's a great question and we are trying to answer it the best way we can.

Zachariah Peterson:

Yeah, hopefully there's more of that integration into layout tools to be able to do that, because I think that's so important is to have that visibility for the simulation directly into the layout. And like you mentioned, if you can just click and it zooms over.

Tim Wang Lee:

Or at least a visual, right? At least a visual on where things are going wrong.

Zachariah Peterson:

That's true. Yeah, at least a visual is important too. Or if it can draw out a heat map and you know can actually see. And with some of those tools that are trying to generate a list of recommendations for designers to follow, are those prioritized?

Tim Wang Lee:

In what's sense?

Zachariah Peterson:

Let me ask you this. If a designer gets a list of six different possible causes of this issue identified in a simulation, how did they prioritize which one to go after first?

Tim Wang Lee:

That's a good question. Usually, we have these one-to-one correlation of the problems and the solution. Say you simulated eight different traces, but one of them is different. Then we know to tell you, okay, this one looks different because the width is this on the other one and the spacing is this on the other one. So for us, it's somewhat unlikely to have different priorities for problems. But I can see where you're coming from. If you look at the S parameters and the plot is doing something that you think has all different possibilities of going wrong, which one do they go first yet? We haven't come across that yet, but I'll let you know. We'll have to come up again and let you know what our solution is.

Zachariah Peterson:

Well, I can give you an example here that I've had to deal with recently, which is via transitions on 56 gigahertz and higher bandwidth channels. So those via transitions have, as I'm sure you're aware, you're dealing with differential lines, it's a lot of parameters and geometry. And when you have so many parameters to try and address, which one do you go after first to try and fix the problem? I can skip a layer, I can change the via diameter, I can change the via spacing, we can develop a whole list here.
 

Tim Wang Lee:

Yeah, that's a good question. That's a good question.

Zachariah Peterson:

The other one that comes up much more often is EMI. Well, not just EMI, but with EMC failures and specifically repeated failures. Because if someone I think has gone through EMC testing a couple of times and they failed, at that point, they're probably ready to just throw whatever solution they can at the problem until the problem goes away. And so if they start to uncover that in a simulation and they start doing a little bit of tweaking to the design and they can't get it to work properly, they could probably come up with a big list of solutions. But which one do you prioritize?

Tim Wang Lee:

Yeah, that's a good question. I'll have to come back and we'll do another updated version of this.

Zachariah Peterson:

That would be really cool. Yeah, it's always nice to know what's going on in some of these tools because I think if you are not an SI person or you don't follow it every day, you just don't know what the options are for you until you talk to someone like yourself.

Tim Wang Lee:

Exactly. Exactly.

Zachariah Peterson:

Well, this has been really great, and thank you so much for this illuminating talk on simulation and the workflow and everything, because this is something that's near and dear to my heart. And I know that more designers are going to need to leverage these tools as technology keeps advancing. So thank you so much for joining us.
 

Tim Wang Lee:

Yeah, thank you, Mr. Zach.

Zachariah Peterson:

No one ever calls me Mr. Zack, but thank you.

Tim Wang Lee:

Really, I'll be the first one.

Zachariah Peterson:

Yeah. Thank you. To everybody that's listening, we've been talking with Tim Wang Lee, Signal Integrity Application Scientist and High Speed Digital Application Product Manager at Keysight. If you are watching us on YouTube, make sure to hit the subscribe button and you'll be able to keep up with all of our episodes and tutorials as they come out. And last but not least, don't stop learning, stay on track, and we will see you next time.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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