Today’s increasingly dense and complex designs combined with tighter logic-level noise margins are increasingly susceptible to power distribution network (PDN) issues because they require very stable power delivery to reliably function. Left unchecked, PDN issues can result in failed EMI compliance certification, delayed product introduction and intermittent field failures.

Rather than treating PDN issues as a post-prototype design consideration, we need a way to accurately identify and resolve all IR drops, current density issues, and voltage drops early and often throughout the board layout process. Power Analyzer by Keysight in Altium Designer makes it easy to resolve PDN issues that arise during the board design process within a unified design environment.

We will cover:

• A brief Introduction of Power Analyzer
• How to analyze your layout for current density and voltage drops
• How to effectively use Power Analyzer as part of the integrated design process directly in the PCB editor
• Power distribution optimization based on Power Analyzer analysis results