Verheerende Footprint-Fehler und wie man sie vermeidet – AltiumLive 2022
Bei der Erstellung von Bibliotheken sind Standards absolut entscheidend für zuverlässiges Design und Fertigung. Doch selbst bei strengen Standards schleichen sich in einem derart detailorientierten Prozess unweigerlich Fehler ein. In dieser Diskussion befassen wir uns mit den häufigsten Fehlern, die Ingenieuren beim Erstellen von Leiterplatten-Footprints unterlaufen. Wir gehen weit über die Grundlagen hinaus und schauen uns einige gröbere Fehler an – und wie Sie diese bei Ihrem nächsten Entwurf vermeiden können.
- Vernetzen Sie sich mit Rodrigo Contreras auf LinkedIn
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Hi, and welcome to Altiumlive Connect 2022. My name is Rodrigo Contreras. I'm a component engineer at SnapEDA, and I'll be your host for this presentation. As you might already know, I will be talking about footprint and library creation, footprint mistakes and how to avoid them. But before I get into what a footprint is and everything else I'd like to begin by setting up context to why I'm here and how it came to it. It starts with a question a lot of you have asked yourselves at least once in your lifetime, why electronics? And for me, the answer goes way back to when I was a child. And it involves a choppy happy birthday song coming out of a cardboard. Ever since that strident super high pitched melody invaded my ear I had to know where it came from. I mean, it came from a musical greeting card, but how on earth was this happening?
I have always been obsessed with what I thought was magic, which later learned was the life's work of thousands of people like you and me over a span of decades. So, since I was a child, I decided I wanted to make magic like that, which led me through the hoops of vocational middle school with an electronics technician diploma, all the way to a bachelor's degree on electronic design engineering and a postgraduate in embedded systems. This passion of making magic has been expressed by bringing all sorts of designs to life. Gathering experience in PCB manufacturing and prototyping, while teaching at a new university and participating in a few projects in product development as PCB designer. Last year, I landed at SnapEDA as a component to engineer, creating libraries for other engineers to use in their designs as I have before. And working directly with suppliers like Texas Instruments, Samtec, Molex, et cetera.
This job has really put things into perspective as an electronics designer, raising questions like how often do we take for granted component libraries in the industry? Or how often do we overlook the quality of libraries while creating or using them? And this is what brought me here today. The wish to share with you the process of creating a high quality component footprint and what to look for. What I want to talk to you about today is the importance of libraries and common mistakes drawn from our community of over 500,000 engineers and PCB designers at SnapEDA. Then we'll share tips and tricks from our component engineering team that has learned over the years. And yeah, I think that's about it. First of all, we will have a quick recap what a library is. I won't go deep into definitions as everyone here probably knows this. And then we'll take a quick overview on why high quality libraries are important. And followed by the workflow of creating a high quality library, some important considerations we should have when creating a library and how we deal with them.
So, a component is, well, a quick answer when asked what a component library is may be a five file or files for an electronic design software that contained a multiple representations and correlations that a component needs during the design capture and implementation processes. So, for short, component is represented as a symbol on the schematic on Altium as SCHLIB, as a footprint on the PCB or PCB leaving the Altium. And as a spice model for simulation or CKT files. As a signal integrity description to analyze the quality of the signals, the IB's file, and as a three dimensional model for 3D component and PCB visualization. For Altium there's different ways to use and store components from the single model files, for each representation, schematic footprints, and integrated libraries. Which work as a container for single model files or even database linked components. [inaudible 00:04:14] format to share library in Altium is a integrated library, which is the one we provide at SnapEDA when you download component.
You may have noticed, I use the term footprint to refer to the PCB layout representation of a component in a library, but there's a common misconception I would like to comment on real quick here, there's actually different ways or names to refer to this representation like geometry, land patterns, cells, et cetera, which you might find in the documentation of different components, depending if they're using the actual conventions or just their in house languages. But according to the general convention guided by the association connecting electronics industries, the footprint is the actual physical size of a component. You can think of it as the imprint you would see if you pushed a component into sand or clay, much like an actual footprint left by, well, a foot. You can see here in the slide I have ... Sorry. I have a component, it's the footprint of a component and I have land patterns right next to it.
The land pattern describes the size of the pads needed to solder the leads of a component to the board, which as you all know, should be larger than the lead itself. One useful consideration to make the difference easier to understand is that a component will have only one footprint, like you can see here in the slide. But it can have different land patterns. It depends on the board density and even the solder method. For example, in this slide, I have the density level A, density level B and density level C. And these different density levels, although they have the same or they are for the same component, they are different sizes. But the footprint is not. So, footprint has only one footprint. The component has only one footprint, but it can have different land patterns. But as we are all aware, this distinction is not widely spread and footprint is still pretty much used to refer to the land pattern.
And this may not change soon as even major industry companies use the popular term footprint, including us at SnapEDA. For Altium there's different ways to use and insert component libraries from the single model files and the containers or the database linked to components or integrated libraries, as I said before. The difference between a single model and an integrated library is that integrated libraries encapsule the single models into our read only file with all the associations between single models already included. We can see a map here of how these associations between files look. And it's easy to see that the core component of library is the schematic file. Through this schematic we can associate all the components in our design, each of them with its own simulation models, a pin list to tie the pin names of a footprint and the footprint itself, which may contain even a 3D model.
So, by now you might be wondering why is having a high quality library important. It is very important, first of all, to ensure proper manufacturing with a high level of automation in the industry and the ever [inaudible 00:07:51] of components, precision becomes very essential. A bad library can cause excessive prototype iterations from manufacturing defects that consume valuable time to diagnose. For example, we can see in these images, I have tombstoning components. Tombstoning is due to having the wrong pad sizes, or even the wrong amount of solder. Floating components, maybe as well be on the wrong distribution of solder paste. Short circuits, maybe do to wrong mapping in your library. You may have mixed signals or even the wrong pad shapes and the solder bridges over and it may cause short circuit. You can see here, the solder bridges in BGA, radiography, or x-ray, sorry. And this can also lead to the incorrect pad positions, which may signify, or which may mean that our components will not fit where they should fit. And the incorrect whole sizes, which well it's the same. Your component won't fit where it's supposed to fit.
Also, having a high quality library is important to enable other cap tools features to function properly. Like ERC and DRC checks. If ERC and DRC checks won't work properly, as they are set to check for manufacturability and poor quality libraries may not contain all the necessary parameters that ERC and DRC checks for, rendering the feature useless. So, another important thing is, sorry, to ensure readability and reuse through consistency. High quality libraries are consistent, which is really important when working in an engineering team as our designs should be able to be read by other designers. Imagine using different symbol standards throughout schematic. This would ultimately lead to hard to interpret schematics and lengthier documentation.
So, after all, why are libraries hard to get right? Why is it so difficult to create a high quality library if so many things depend on it? And the short answer is libraries require many detail and error prone steps. The creation of a library can be played into three remain steps. But if we look closer, each step is divided into more steps. The way I see it, a bird's eye view of the process includes eight steps after knowing what component we are going to use to create a library. The first one is finding the data sheet, finding the data sheet may be kind of easy depending on which manufacturer. But you should always strive to get the newest or the most up to date data sheet. Then we are going to find the pinout table and extract symbol information, or that's what I do, that's my workflow, to create a symbol in CAD. Then we find package drawing. Then we intemperate the drawing and extract the dimensions. Then I create a footprint in the CAD and map the footprint and symbol.
And last but not least, add attributes. Sometimes attributes are overlooked, but we have to add them to make sure that our library is going to work properly in our whole company environment. The scope of the difficulties we find when creating high quality libraries is massive. Number one, it's an extremely detail oriented process. A little detail missed to be noticed, can lead to a poor quality library. Number two, data sheets from every manufacturer and for every component are very inconsistent. Even between components from the same manufacturer. And there's no widespread standard for them. There is taxonomy category, data models developed that helps with this, but no standards. There's a standard for symbols. There's a standard for footprints, but there's no standard for data sheets. Number three, there's also no standards for libraries. And that's it. There is no standards for library creation. Number four, there's a lot of variables to be taken into account when creating a library. But when it comes to manufacturing, all manufacturing houses have different manufacturing capabilities, which really caps the range of parameters we can include.
Number five, there's over 300 million components out there, each with a library to be created. So, having an in-house library for each component is almost impossible and represents loads of work. And number six, there's not enough recognition of the scope that a high quality library impacts. So, they are often considered a side dish when talking about design. And libraries get no glory. So, what's exactly, or what am I looking for when a library is complex? Well, libraries can get complex sometimes. For example, I was telling you about differences between manufacturers. And this is an example of this. For every component the data sheet may have multiple part numbers, different package, and even pin name and pin mapping variances. On top of that, the standards that define pad sizes change frequently. And there also could be confusion around using the manufacturer's recommendation via a standard like IPC. If you can see in this slide, we have this part or this family [inaudible 00:13:32] parts, it's a QTE. And we have leadstyles four, five, and six and one, two, three, seven, eight, nine and 10.
We have that these numbers in the partnering could change the footprint absolutely. It changes the pad width ... Sorry, the pad length, which is 1.45 for one, two, three to eight, nine, and 10 leadstyles. And it's 1.94 for 04, 05 and 06 leadstyles. This may mean that if we don't look or we don't extract the correct data from the data sheet, we will have a footprint that won't fit the component I'm trying to fit. With the multiple data sheets and manufacture recommendations of many of them, it's difficult to maintain consistency over a lot of libraries, especially between different manufacturers. We can see in this slide, we have the footprint for an SOIC-8, it's the LM555. And we have two manufacturer land pattern recommendations. And as you can see, these are very different. One is 4.8 in length, and the other one is 4.4 in length. This might mean that we can have two footprints, but here's when IPC or any standard you may want to use comes to play. If you use standardized standard packages, well like JEDEC packages, you won't have this difference between the same component, but with different manufacturers.
Also, I was telling you about how, which manufacturer has different manufacturing capabilities from minimal trade size to Tented field or Blind vias and even million capabilities. We can see here on, it's two different manufacturers. One of them allows blind vias or Tented vias, even Buried vias and the other one does not support them. So, we have to be very sure that what we are putting into our libraries may be manufactured by the majority of manufacturers. So, let's begin with it. What are the common mistakes and how to avoid them? The first step of creating a library is creating the library file and the symbol. There's many workflows you can follow to create high quality library formats ... Sorry, high quality libraries. And for this presentation, I'll show you the one that I personally use when creating libraries for SnapEDA. The first step is to create the integrative library file.
Make sure to save the library with the correct part name. To avoid any issues with managing supplies you may want to export a bill of materials from your designs, and if you have the wrong footprint name or the wrong library name, you won't have the correct part number to order the part. So, this is very important. The next part of this step is to source the most up to date data sheet of the component from the manufacturer directly, if you can. Sometimes we cannot source the data sheet from the manufacturer directly, because maybe it has been discontinued or it is too new so they don't have the data sheet available to the download from their site. I recommend you also looking on big distributor sites like Mouser or Digi-Key. Sometimes they do have some data sheets that are not available on the manufacturer sites.
Upon acquiring the data sheet, the type of component has to be identified. Is it a diode? Is it a capacitor? Is it a power IC? Or is it a connector? After successfully identifying what kind of component you're dealing with you then look for the standard symbol. The standard we use at SnapEDA for symbols is IEEE and ANSI standard. Often enough, the symbol is given in data sheet, although not all time is the standard symbol. For IC's symbol creation is managed by creating regular rectangles varying in size, depending on the number of pins. For this example we have no schematic symbol in the datasheet, but there was a schematic application which shows a symbol comprised of other smaller symbols. And this could be considered as an IC, as it involves having different components internally connected like a module for which we use a rectangle symbol for consistency between our other libraries.
And this also lowers creation times. For ICs we always tend to see different symbols with different pin arrangements. Sometimes we see pins on all four sides, sometimes only on two sides. And all of them are okay. At SnapEDA, we took into consideration the most sought after arrangement through a survey we performed on the website users. And we feel like it is a great arrangement as it is clear, concise, easy to work with, and very easy to interpret and read, which is a feature of a high quality library. And it is worth mentioning that there's other preferences which can be accomplished too or can be used. But we just went with the most sought after one. This is apparently the ones that engineers like the most. One huge feature to be looked for is a pin grouping by function, where instead of taking the physical sequence and arrangement of pins, you look for the function of each pin and arrange them by group accordingly.
It may be I2C pins, input pins, output pins, power pins, supply pins, but you can group them by function. And this is going to give your symbol a different view and ease of use. When there's a package that could be used in different parts of the schematic it's worth separating its symbol into different parts to maintain the readability and ease of use. For example, if we had a quite [Op Amp 00:19:45] in maybe a SOP for gene package, separating each Op Amp into its own piece of symbol allows us to create or to make cleaner and less confusing schematics. This is also true for parts with a huge pin count like FPGAs. FPGAs can, as you know, sometimes go over 1000 pins, but for this parts, the segmentation will work with the embankments, you must seek for the embankments of the FPGA and separate them by bank.
As you can see here, we have the outdated data sheet slide. You can see in this data sheet that we sourced from Texas Instruments, I believe, that the previous version, the three [inaudible 00:20:39] zero, the 3/0 had the exposed pad, well, tilted or offset it to the site. And this was a drawing error, but you don't know it's a drawing error. That's what the manufacturer is giving you. And it's going to be difficult to really use that symbol. So, for the new version that was in the manufacturer side, the exposed pad or the thermal pad was, well right in the center. So, you really have to make sure to get the most up to date data sheet. Another common mistake is not including pins that aren't electrically connected, and this may seem normal because, well, they are not electrically connected. But many manufacturers still recommend to connect these pins to ground to eight in electrostatic discharge.
This gives us the option to connect to ground or leave them floating. At the end high quality library must be very specific. And this is just that, being very specific through the symbol. This may sound kind of absurd, but electrostatic discharge is no joke when you have overly sensitive components. And as you know, many high speed connectors require this to function properly as the electromagnetic interference is highly mitigated through the connector shield being grounded. A great example of this is a board that was developed by a team I worked with. They used RJ45 connectors to manage multiple I2C basses through Cat 5 UTP cable. And they kept hearing false data. And over time, well about two days of prototype abuse, the is I2C [inaudible 00:22:29] the micro controller just went caput, every now and then, every now and then, and it was rendered useless.
After an extreme trouble shooting we found out that the shield on the connectors were not grounded, because the shield pins were omitted in the library. So, when the prototype went for a ride on the rooftop of a van on dusty roads, enough electrostatic charge was generated and not dissipated. So, the basses kept getting zapped with thousands of volts every now and then. As this was a prototype, the workaround was extremely easy. All the boards had this solder mask scraped with the scalpel, around the pin shields and soldered with wires connecting the round plane. Of course this library was updated, but it was a highly frustrating process to troubleshoot. And this could have been avoided by a couple of clicks when creating the library, you just had to add the shield pins. Another common mistake is not defining the pin direction or function. This part of creating a library may not seem critical, but when we are creating a library that is going to run through ERC and DRC checks and even circuit simulations, this small parameter will define whether we can trust the outcome of these simulations.
This is often overlooked by the designers as the default pin direction when a ping is set on a symbol does not give ERC or DRC check errors when connected. The direction is the base for calculation in ERC checks. So, if two inputs are connected together, nothing may happen. If two outputs in totem pole are connected together, you may have a short circuit. On the other hand, it is quite normal to tie a couple of outputs together if these are an open connector, but we have to define that in the symbol or else we won't have the, well a trusted DRC or DRC check.
The next step I take after creating the symbol is to look for the mechanical dimensions of the component to calculate the pad size of the land pattern. You may be wondering how are we doing this? But to define whether a hole is plated through or non plated through is also a very important step here. And even to define the pin sequence. Most of the time, these mechanical drawings are on the data sheet. Although some manufacturers distribute them as a different document. Interpreting the data sheet may be difficult for complex part. So, often they have too many things happening at once. What you should be looking for is for notes and addendums on the data sheet, which usually reveal information that is not visible through the mechanical drawing by itself. So, a big part of interpreting a data sheet relies on looking for this extra information given to us through the small print, and this involves reading all the way through the data sheet.
You must know what you are striving for. In this slide we can see one of the common mistakes in misinterpreting data sheets. We have this design, this is a big mechanical drawing. And I have highlighted here 2.28 millimeters, the 2.28 millimeters dimension. It may seem, or it looks like this dimension is given from this edge of this upper pad to the center of this lower pad. But actually what is happening here is that this distance is measuring the distance between the center of this pad and the edge of the shield. So, it is a very big mistake. It could lead to, well a horrible library. So, you should really look for details like this. Another case of misinterpreting data sheets is that most PCB manufacturers assume that the size of the drill hole you specify in your library is a finished hole size after plating.
So, you should really analyze the data sheet and even look at the 3D model and real images of the component, to really know if you are going to need this or not. Also, for plated and non plated through holes, you should really look for the definition of plated through holes or non plated through holes. If the pin is metallic in the 3D model or specified in the notes that the pins are metallic, most likely they would need a plated through hole unless otherwise specified. You may have an non plated through hole for a metallic pin, but it has to be specified in the data sheet. Otherwise, well, it's plated through hole for a plated pin.
This is actually the capture of a data sheet that I messed up two weeks ago. As you can see, this is a connector that has different views, you have the top view and a side view. And you have a central line that goes through the middle of the key and the middle of the pack, and well, it looks like one simple central line, right? But we have, well, the word central line for key and central line of peg. And when we watch, or we see where there's the union of those both, of two center lines, we have an offset. So, my pins were offseted by 0.15 millimeters from the body outline. And well, the component was not going to fit. Another common mistake when creating, or when reading data sheets, interpreting data sheets, is pin sequence or pin mirroring.
This mirror view is very common. This occurs when the top view of a part is mistaking for the bottom view, generally compose vendors draw based on the top view or the component side, but occasionally they'll do the opposite. This also occurs when you don't bother to check thoroughly the data sheet and assume something to be true. But you always have to corroborate. And I'm being very incisive with this, because this will was the first footprint mistake I encountered. I was making a sensor board prototype for photometry unit. And I used the library from the guy in the team who made the libraries. And he was pretty confident about this library because there were only four pins, as you can see in this slide. So, we went with the PC manufacturing and when we first fed the board, pop. The smoke that makes the sensor work just leaked.
And as you may imagine, it's extremely hard to get the smoke inside the component again, if you know what I'm talking about. So, we diagnosed all the board and we couldn't find anything wrong with it until we started checking signal by signal, pin by pin. And we noticed that the view was mirrored, which meant it was in reverse polarization. Fortunately, on that side of the board, there were only two components, this sensor and another sensor about one centimeter apart. So, we just rotated the sensor 180 degrees, and we were able to test it successfully. But the mistake here was overconfidence. And mirror view, because a data sheet was misinterpreted. You can see in this slide how it was misinterpreted, you have the side view of the component, and next to it we have the recommended pattern. So, one could assume that it's going to be positioned this way in the land pattern. And so the sequence will be one through four. And it looks like it, you may imagine the component going this, top view, side view. Everything's normal.
But when reading the entire data sheet, we found out that the component was actually backwards. And yeah, this is also very important, or this confirms the importance to have, to read or to go through all the data sheet to avoid mistakes like this. Okay. Now I have a high quality symbol. I have already interpreted the data sheet and have all the mechanical dimensions I need. So, the next step is to create the land pattern, aka the footprint. To do this I need to have the dimension of the pads where the component will be soldered. And there's a couple of methods to achieve this. And the method will depend on whether the package is a standard package, defined by JEDEC standards, which are compatible with IPC or a custom package. It is very important to mention also that there might be some cases where a standard package will have [inaudible 00:31:48] like thermal dissipation patterns or special mechanical considerations for them. This is where the interpretation of the data sheet comes to play. So, for standard packages with no special considerations, I usually ignore the manufacturer recommended pattern, if there's any.
And go ahead with using the IPC compliant footprint creation tool in Altium. This is an extremely good tool. It's actual called IPC Compliant Footprint Wizard on your PCB editor in Altium. And this has the advantage that it will comply with the standard used by more than 4,000 partnered with the IPC standard institute. So, verification will always be easier. Also, the JEDEC standard is partnered with the IPC standard. So, all these pad size calculations are specifically designed for these packages to perform optimally. You may use the recommended pattern if you wish, but having a standardized land pattern helps with bringing consistency throughout all your libraries and components that use the same package. This really, really, really speeds verifications. Now for non centered packages, the best course of action is to follow the manufacturer recommendations. And sometimes we can even do both. You can see in this slide on this image, the image number one, the one in the left that we have JEDEC standard package. It's a QFP. And we also have a pretty standard footprint for it.
It was calculated with IPC compliance and that's it. It's going to be consistent. But if we look in the middle, we have a QFN package that really needs thermal dissipation to be inserted into it. So, instead of following precisely the manufacturer recommendations, because although these had special needs or special considerations, it was still an IPC or a standard package that we could calculate with IPC. So, what we did was make a hybrid. We used the IPC recommended pattern or the IPC calculated pattern, and we added the thermal vias recommended by the manufacturer. And well here at the right most we have a non-standard package. This is a fully non-standard package. We used the recommended manufacturer pattern, and that's about it. We just had to follow dimensions and that's it. But what happens when I don't have a standard package? What happens if I don't have a standard package and no recommended pattern?
Well, the best course of action is to use standard calculation tools. There are some tools online. What I use sometimes is one called Library Expert from PCB Libraries. It's a very good software where you can calculate the pad stack or the pad dimensions of a single pad to use on a recommended pattern or to use in the shape of the mechanical drawing you're having. So, you can calculate the pad sizes and the pad dimensions from your mechanical drawing with these special tools. You can look for these tools online and you will find these tools online.
Okay. So, what are some common mistakes with this? With the great variety of the design softwares available, the variation on layer names can be confusing on which layer is which, and the ones that contain all other information for manufacturing. For example, the silkscreen layer, which is top overlay in Altium, is named tplace on other softwares. Some of the terminology can be confusing when translating from the data sheet to our design software. So, it's not as surprising when sometimes this information ends up on another layer. It is not uncommon to mistake the footprint, sorry, the silkscreen for the body outline, which could actually lead to printing the silkscreen on top of our pads.
You don't have to really worry about this as the DRC checks are going to warn you. But if you still go on through the manufacturer will also warn you. And if that goes through, the manufacturer usually cleans the pads before plating them or before the anything else. So, this image is not going to be very common, but it can happen. And this will cause the solder to not flow properly, creating a poor solder joint. It is not uncommon to mistake the silkscreen for the body outline. This really doesn't sound like a real problem, but it becomes a very time consuming task to find the correct orientation for components when dealing with densely populated PCBs. And it becomes a real challenge for testing without all the useful information on the board. This happened also with the board I was telling you about with the mirrored view, the silkscreen was not there. So, it was very cumbersome to orientate and to know where to put each component just by the footprints, because there were no markings at all.
This is other common mistake I've seen, and it has a very big scope. This ranges from having the wrong pitched pads, too small pads, too big pads to even the wrong shape of pads. The cause for these errors vary from a lack of attention to detail, to even unit conversion. This kind of mistakes usually lead to catastrophic failures with unique consequences to each variant. For example, the wrong pitch may render impossible to mount to the component, leading to a total rework of the board, or even having to serve as a different component that fits that footprint, if you are lucky enough. Also the wrong pad size could you lead to weak solder joints, tombstoning and poor electrical contact. This is when the IPC standards are a huge help. It helps us determine the correct pad size for the components, pin size and density level.
And this ensures a robust solder joint. This is excellent for a standard packages and for non-standard packages that do not have a recommended pattern from the manufacturer. This slide, sorry, is a slide where you can see that following the manufacturing recommendations for non-standard packages or special applications is very important also. We had this case where a client of us was very sure there was a mistake on the pad size of the components' library. It was these four pin vertical coil inductor, sorry, horizontal coil inductor. And the recommended pattern had the pads elongated to the sides, which made it look very different from the component's bottom side. After further investigating, it turns out that the pads had that size and shape, because the component would actually rotate on its own axis when were flowing because of the weight distribution on the component. You can see here that the coil endings are diagonally placed. So, if we used the pad shapes exactly like the pads from the underlying, sorry, from the under side of the component, the component would have rotated when flowing.
You can see here, this is the actual vector schematic that we drew for our client, where we show him that the surface tension of the solder in these pad arrangement size and shape actually delivers good tensors to stop the component from rotating. Had these pads been resized to resemble the components bottom side, all of the inductors on the board would have been twisted and not functional. This would have cost lots of time and resources to rework, or even re-design. Like the wrong layer error, this error can lead to poor solder joints by avoiding proper solder flow. But this one is harder to detect. If you don't have your DRC program to detect the distance on silkscreen and pads, you may add the silkscreen too close to the pads, and manufacturers sometimes have different registers for their different machines so this can offset the silkscreen just a tiny bit. But this tiny bit may be enough to put the silkscreen over the pad. And well, this also prevents solder from flowing and yeah, poor solder joints.
These may be corrected. One thing I recommend you about thinking when creating a library is to keep distance of the same line width of your silkscreen. That distance, that width to keep it as the distance between the pad's edge and the silkscreen. This is going to really avoid it.
This is another mistake. This is the wrong body outline dimensions. This mistake may lead to components overlapping over each other. And this includes not only the body outline, but also the cord. You can see here that this right angle connector was mistaken and it was misinterpreted, and the body outline was drawn as symmetrical around the pin leads. But this wouldn't have been true if the header was vertical. But it was right angled so the outline was really, really, really offset. And this can cause components to crash. We can actually see this exact same mistake in this slide. We have a footprint for a vertical connector and a right angle connector connected to it or soldered to it. And yeah, it crashes with the other component. This is a prototype, but this could actually happen during PCB assembly on a production line.
This could lead to the damage of the PMP machine headers and that could cost thousands in repair fees. I was talking to you also about the courtyard dimension. Getting our components to fit into a super small board is important to a lot of us, but this will not work well if we don't consider the space needed to assemble the board with all the components. And sadly, this is often overlooked by designers or assigned with arbitrary dimensions. But how much space do we need for it? I mean, a machine will do that for me, right? And machines are super precise. But for this exact reason is why an excess courtyard needs to exist in our libraries. But really how much space does a machine need? It depends on the density level of our board. As a designer, you may not know how much this space is. But luckily for us, several manufacturers met to the lever on what dimensions may fit a majority of manufacturing companies capabilities.
And this distance is specified in the IPC-7351 standard. While creating libraries for SnapEDA, I use the density level B distance, which is 0.25 millimeters, and one millimeters for BGAs as this is the normal density level. Most PCB manufacturing steps have a certain registration tolerance where alignments might not be perfect. And this is a fact on many manufacturing processes, allowing room for the worst case means registration combination makes sure that we won't have components clash across many manufacturing rooms. The assembly hits that peak and place components need to maneuver into tiny spaces where components that have already been placed might be in the way. Having more room allows them to do that, exactly, without potentially banging into them. Space helps also optical inspection to detect issues after assembly. More room between components help reduce the heat density by allowing increased airflow, but sometimes components or large components may cast a shadow over small components placed next to them.
This can cause cold spots where solder paste is slow to melt compared to other areas of the board during assembly. And even if we are soldering through whole components in the wave soldering machine, these shadows will also impede the solder to get the pins or, well yeah, to the pads and pins that we are soldering. And it won't work. So, we have to have a good courtyard access. Yeah, I almost forget to mention this. In this image I used a BGA for you to see the one millimeter space. I don't know how many of you have reballed a BGA. But if you have reballed a BGA, you really know that you need space for this. So, one millimeter around all coroners of the BGA will be enough to rework this BGA. Another common mistake is not segmenting solder in the thermal pads. So, you have QFN, you have thermal pad and you just use the solder paste mask or the solder paste stencil as the same size of the thermal pad. Well, not actually.
In terms of thermal pads or exposed pads, SnapEDA follows the IPC-7351 paste mask standards. It is recommended to set the size of the paste mask to only 40% of the whole pad area for the thermal pads that are four millimeters squared or less. It is also advisable to create the stencil design as segmented squares or rectangles, instead of just one whole paste area. The distribution of paste, when reflowing, could make a big blob of solder on which the component will float, and the leads won't make contact. If we evenly distribute the solder, the float will be minimum and the lead contact will be insured. You can see this actually, in this slide. We have a big blob of solder underneath this QFN and the leads are not making contact. So, if you reduce the solder paste and redistribute the solder paste, you are going to end up with a pretty well mounted component. It looks like this in the footprint. And yep, you should segment your solder or in thermal pads.
One common mistake I see a lot in libraries is that restricted areas and data sheet are completely overlooked by the creator. This mistake is tied to misinterpreting the data sheet and not understanding why is there a recommendation to avoid the area of any [inaudible 00:48:08] traces. To avoid this, try to analyze how is the component held to the PCB. How it interacts outside of the 2D drawing. And even how it is constructed. By doing this in depth data collection, we can start correlating what we are seeing in the data sheet with what all the notes says, and also important of including these restricted areas in library. This is a great example of that, because even when reading the notes, you can read the note, actually and make sure the width of pattern is within that of land, or lead may touch pattern. This applies to hatch area. This doesn't make really much sense, but because the hatch area does not appear to have a logical explanation or importance, but then we'll look at the construction of the connector, the contact blades for each lead extend all the way down to the board.
With some sharp edges, that could easily penetrate the solder mask, reaching the copper layer and create an issue, maybe even a short circuit or compromise the signals. So, for this board, a quick workaround would be to just use the same signal going back. But we really recommend you to follow the data sheet and to read through the whole data sheet, to interpret or to really know what the component requires in your library. This is to create high quality libraries. So, the last step is mapping the symbol and footprint. We already have the symbol, we already have the footprint. So, what are we going to do with it? Well, we're going to associate the symbol with the footprint. And doing this it has to be very, you have to be very detail oriented. Again, because you usually tend to find the pin outs or the pin managing, pin mapping of the component in these kind of drawings.
Sometimes they are not in tables, but they are in these kind of drawings. So, you really have to make sure where your component is oriented or even if it's in the bottom view or the top view. So, yeah, let's go with what common mistakes are committed here. Although this might sound like a mistake only an [inaudible 00:50:34] could make, it is worth mentioning it to be thorough. And it is wrong pin mapping. I've been creating libraries for a good 10 years now. And sometimes this happens to me, especially with two easy components. Sometimes components look very easy to make, and they are. But the devil lies in the simplicity. These simple components tend to have no pin numbering on the data sheet, and it is completely normal. They are polarized and the positive got to the positive, negative to negative. And it's as simple as that, right? But when we are talking about high quality libraries, it goes way beyond that. Consistency is a tough track to follow sometimes.
And luckily for us, there's a general consensus between a lot of manufacturers on which pads should be the positive and which pad should be the negative, depending on the component. And this is called the land pattern zero orientation, a quick internet search for the term will spit out an extensive list of the zero component orientation convention by component with pin number and pin orientation. In this example, the polarized capacitor should have been mapped with the pin one, going to the positive side on the symbol. It is clear when seeing the polarity creator expressed in footprint, but it is also simple. It is so simple that it can be easily missed. And this is not merely hypothetical. I have seen this happen in low level production environments where the board was manually assembled following the indicator on the board. And well, the board kept making this awful, although low key satisfying, popping noise when connected. And this is not require already sign as the volume of the boards was very low. So, just an [inaudible 00:52:22] was published for the manual assemblers to look at while working on the board.
Had this been a high volume production this wouldn't have been as much troublesome either, as the simple workaround is to instruct a pick and place machine to rotate the component 180 degrees. But this still requires a good amount of time and work, which could have implemented from the library creation and standardization. This simple mistake is easy to avoid, not only by being detail oriented, but by a verification process and validation. I'll talk a little about this at the end. For integrated circuits they usually follow the convention everybody knows, but not always. So, you can make this mistake, which is taking the wrong pin sequence. So, sure they match with what you're expressing in your library. Where you should really watch out is connectors. Connectors do not have a standard sequence and vary from manufacturer to manufacturer. If you have the wrong pin sequence, you risk having signal mismatches when connecting to the connector or even a short circuit.
Sometimes the manufacturer even relies on the designer knowing the standards for standard connectors, like the DB connectors. We have here, DB15 connector, which follows the DB connector standard. But on the footprint, the sequencing is not that standard. In the footprint you may see that there is position number one on the right side, you get to the right side, you start numbering one through 15. But this is not the case as we have two rows converted into only one row. So, we have skipped numbers and mismatched numbers. So, what are some tips and tricks for building world class libraries? First of all, take advantage of standards. All these institutions have already done the work for you. Years of research and development, to know exactly what sizes a pad need to offer the best joint, both electrically and mechanically. The perfect amount of solder paste, the most practical amount of [culture 00:54:34] distance, the most understandable symbols, basically a guide for consistency. Everything done just for you to take the advantage of. The next step is to define and refine your process.
So, I just told you about my workflow about how my process is, but you should create your own. You should define your own process. Start by part creation. How are you going to create your part? If you're going to create first your symbol then your footprint. And what's a workflow that works for you. We are engineers. We all know that there are different workflows that work for each one of us. And yeah. Good tip I can give you on part creation also is to create comprehensive checklists. Create checklist with the most essential things, to not forget them when you are creating a library. Also, try to do verification. Before manufacturing have a second engineer or a second peer verify the mission critical details. The ones that are on the checklist. You can also create a checklist for verification. And if you have time and you're knowledgeable enough, you may create an automated verification, introduce automation to make the process more efficient and reliable.
If you create a good algorithm, you are not going to mess it up. You will have perfectly checked or perfectly verified libraries each and every time. And for the last bit of this tip is to get the feedback. At the end of your process, use it, manufacture it with it, see all the details, detect errors, detect issues, and feed them back through your loop. Refine your process from your mistakes, learn from whatever you do, and always put it where it should be. One last trick or tip is to include mission critical elements in your checklists and consider every detail in your style guide. This is actually the style guide we use at SnapEDA where have the drill for mounting holes, courtyard access, contoured courtyard, stencil and solder mask defined, both of them defined and the body outline. One very important thing also, the pin indicator. We talked about it in the silkscreen. But yeah, create your own style, create your style guide. And adhere to it. Remember that consistency is very, very, very important in high quality libraries.
Also, if available, automate everything you can. At SnapEDA, we have all automated processes for verifying, for creating some libraries. And yeah, we actually care for them a lot. And it has helped us get to the point where we are. So, for the conclusion, high quality libraries will spare you a headache, ensure reliable manufacturing, proper ERC, DRC checks, and readable schematics by creating high quality libraries. To avoid errors in your creation process, implement creation and verification checklists for mission critical elements and a style guide for everything else.
If you're going to do this, make sure to educate your team on the importance of high quality and standardized libraries, even show them this presentation. Create feedback loop based on your team's learnings and automate as much as you can. Almost all libraries are just formatted text if you open them in a text editor. So, you can find a way to automate things, maybe a Perl script, maybe a Java script. Well anything that can modify text can modify, verify, or create a library. And lastly, remember that verified supplied vetted libraries are available on SnapEDA. And thank you so much. Have a great day. Stick around for the Q&A. I would really want to hear from you.