FPGA Power Sequencing Requirements
FPGAs, DSPs, power amplifiers, MMICs… these components can have multiple voltage rails which require power sequencing in a specific order. The purpose of this sequencing is to prevent damage from latch-up, transients, ESD, and inrush current. Therefore, a sequencing process needs to be implemented in order to bring up power to the chip and instantiate the device’s embedded application.
As FPGAs are large components with complex subsystems, power sequencing is a requirement for many FPGAs whenever the component vendor specifies. Simple sequencing strategies used in larger systems with many components may not be suitable for an FPGA due to their lower voltages and smaller margins on noise and transients. Follow these tips for power supply sequencing in FPGAs
Typical FPGA Power Requirements
Take a look at a typical FPGA pinout and look at the power net connections on the package: these components could have 3 power rails on a smaller FPGA, and up to 10 or more rails on a very large FPGA. These rails all run at different voltages and can have different voltage ripple requirements. These rails power different subsystems within the FPGA, such as core logic, PLLs, or high-speed I/Os. This leads to different control loop bandwidth requirements for the regulators powering each rail.
Although the power rails on a typical FPGA may be susceptible to damage, the strategies for implementing power sequencing can be quite simple. These may include any of the following (or combinations of these options):
- Digitally toggled EN pins on regulators
- Cascaded PGOOD pins on regulators
- Toggling regulators based on direct current/voltage measurements
- Toggling regulators based on simple time delays
- Toggling using a reset controller IC
Due to the tolerable noise margins, FPGA power rails will demand their own dedicated regulators rather than sharing a regulator across different rails. This is different from the case of powering multiple banks, which is often performed with a single regulator at the required voltage.
There are some general sequencing rules and design goals which apply to FPGA power sequencing:
- Monotonic ramp: Power supplies should ramp monotonically without significant dips or overshoots during the voltage ramp. Typical ramp rates depend on the particular FPGA part number, but typical core logic rails may toggle ON in ~ms intervals or faster.
- Voltage differential limits: Voltage limits during power-up are sometimes specified in terms of a potential difference between any two rails.
- Voltage saturation limits: Some rails may be required to reach some fraction of the final voltage before the next rail can power ON, typically ~90% of the target voltage level.
- Simultaneous vs. sequential: Modern FPGAs can be more flexible (e.g., Xilinx FPGAs) and can tolerate simultaneous power-up of rails, but some still require specific sequencing orders.
For these reasons, dev boards for moderately large FPGAs can include on the order of a dozen regulators at low voltage/high current capability. Current limits in the power regulators for FPGAs can reach 3 A on certain rails, particularly on rails which will supply a large number of fast I/Os.
Power Regulator Requirements For FPGAs
The individual power regulator circuits on each FPGA power rail can be switching regulators or LDOs, although typically switching regulators are used due to their control loop bandwidth capability. Multiple power regulator options can be used for FPGA power rails:
- Multiphase power regulators
- PMIC components with multiple outputs
- PMICs or single regulators with output monitors
- Simple fast regulators with PGOOD indicators
PMICs can be useful as they may have built-in or programmable sequencing, although these may require an external MCU if the sequencing is to be programmable. Furthermore, the control loop bandwidth of PMIC outputs can vary wildly, making some output rails unusable for fast I/O power supply rails on an FPGA.
Because most pins on a large FPGA will be fast digital I/Os, the best option is typically compact fast switching regulators that are purpose-built for high-speed digital processors. An external chip or sequencing approach is then needed to perform the required power-up/power-down sequencing.
Finally, we come to the requirements in the PCB. Moderately-sized FPGAs with hundreds of pins can require a dozen layers or more in order to route all power rails and I/Os. With high layer counts is a requirement for power layer/ground plane pairs for the FPGA rails in order to ensure sufficient interplane capacitance. In FPGAs with dedicated regulators for each rail, it is common to put multiple rails on a single layer and route them in parallel because an entire power layer does not need to be a plane.
The video below shows an example with multiple rails on a PCB for powering MMICs and an FPGA.
This approach helps ensure lower power rail impedance in the PDN without rails taking up too much space on a single layer. Focus on sizing each rail to the required current, and then oversize each rail to provide higher plane capacitance/lower spreading inductance, which gives lower PDN impedance.
Simple Power Sequencing With Monitoring
The set of power sequencer ICs on the market cannot provide a combination of power monitoring, logic operations, and power toggling in a single component; they either omit some of these features or they require an external MCU with an embedded application in order to implement all of these functions.
Instead of using a set of power sequencer ICs or power switch ICs, a programmable mixed-signal IC provides an easy-to-program solution for power monitoring and sequencing of FPGA power rails. The GreenPAK product line from Renesas and its easy-to-use development environment offers analog functionality with CPLD-like logic implementation, allowing monitoring of power, fault detection, and sequencing in a single component without requiring an MCU or an embedded application.
Renesas GreenPAK programmable mixed-signal IC used in a power monitoring and sequencing application for an FPGA.
To learn more about the set of GreenPAK hardware and software solutions for programmable mixed-signal systems, designers can leverage well-documented reference examples for applications like power sequencing and monitoring.
Whether you need to build reliable power electronics or advanced digital systems, use the complete set of PCB design features and world-class CAD tools offered by Altium to implement your GreenPAK solutions. Altium provides the world’s premier electronic product development platform, complete with the industry’s best PCB design tools and cross-disciplinary collaboration features for advanced design teams. Contact an expert at Altium today!
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