When placing parts for a PCB design, the placement often leads to connections that will cross over each other. Although vias to other layers or slightly longer trace routing can be used to address a small number of crossover connections, a large number of crossovers, like those in the figure below, can make routing extremely difficult and time consuming.
For more complex routing with larger numbers of crossovers, PCB designers typically employ device pin and sub-part swapping to reduce the number of crossover connections. While pin or part swapping eliminates crossovers in the PCB, such changes must also be passed back to the schematic. This paper describes a method by which pin, sub-part, and diff-pair swapping can be easily managed for optimal routing by reducing crossover connections, all while maintaining design synchronization between the schematic and simplify PCB routing.
A PCB with many crossover connections
Optimal component placement goes a long way towards minimize crossover connection lines. However, crossovers can never be completely avoided. A large number of crossover connections make routing the PCB extremely challenging and time consuming to complete. It is common for PCB designers to, wherever electrically possible, swap net assignments from one device pin to another eligible device pin. Similarly, sub-parts within a common package can be swapped to reduce crossover connections.
Pin swapping relies on the fact that nets of two different physical pins can be swapped without having any negative impact on the electrical functionality of the design. A basic example would be the two pins of a resistor. Because a resistor’s pin does not have a unique polarity, you can freely swap the pins to eliminate a crossover, and yet still function as intended.
Another practical example would be a high pin-count connector, where there is not a strict requirement for a specific signal assignment to each and every pin. With the flexibility to swap many pins on a connector, several crossover connections could potentially be eliminated. Perhaps the most eligible component type of pin swapping is an FPGA device, where its user definable I/O pins, within applicable voltage banks, let you freely re-assigned pins as needed.
With sub-part swapping, similar parts within a common package are swapped. For example, an LM6154 Quad Op Amp IC has four separate and identical op amps within a single package. Thus, you could swap op amp C (pins 8, 9, and 10) with op amp A (pins 2, 3, and 1) to eliminate crossover connections lines while maintaining the same functionality. Sub-part swapping is sometimes called “gate swapping”, implying that the 4 individual gates within an SN74S02N Quad NOR gate package can be freely swapped.
Device pin and sub-part swapping greatly help in reducing the overall number of crossover connections in a PCB grounding. To successfully implement device pin or sub-part swaps, you must define up front which pins are eligible to be swapped. Furthermore, once pin or part swaps are made within the Printed Circuit Board PCB design, the schematic must be updated to reflect the changes and remain synchronized with the PCB layout. Failing to keep them in synch can lead to disastrous errors.
Pin or part swapping is accomplished in three general steps: configuring the swap data, performing the pin or part swaps, and finally, synchronizing schematics with the swap updates.
Swap groups define the pins that can be freely swapped. Any pin within a given swap group can be swapped with any other pin within the same group. Defining swap groups is typically a one-time effort that can be performed at the symbol library level, the schematic level, or within the PCB document. Swap groups can be defined for any component or component instance at any time in the design process using the Configure Pin Swapping panel. Defining swap groups for Differential Pair and Sub-Parts swapping can can be similarly defined. The figure is a screenshot showing how swap groups can be easily defined.
Defining a group of FPGA I/O pins according to bank number
Once the swap groups have been defined, pin swapping, differential pair swapping, or sub-part swapping can be performed interactively within the PCB design process document. You invoke the interactive swap capabilities using Tools > Pin/Part Swapping, according to interactive pin swap selections you have made. There is also an automatic pin swap mode, which will analyze all crossover connections within the layout and automatically swap multiple pins to achieve the minimal number of crossovers as possible.
A very critical aspect of pin swapping is to update the schematic to synchronize the project with the pin swap changes that were in the PCB layout. Do this by simply performing a PCB to Schematic update within Altium Designer. A best practice to keep in mind is to use connection by Net Label in the schematics for any nets that may be associated with a swap group. This practice ensures that the only changes made to the schematic will be Net Label substitutions. Otherwise, if net labels are not available, pin swapping would require schematic symbol pin substitutions to accomplish pin swapping. Schematic pin substitution is permissible, but is disabled by default. It is not advised because the resulting symbols will differ from the original symbols within the library. Connection by net label is the most practical method to support pin swapping.
Once the swaps have been made, you can once again review the connections to see how much improvement was made. Using the methods described here, the board in the first illustration now appears below. There is significant reduction in the number of crossovers.
Pin swapping performed on FPGA (compare to the earlier figure
Crossover connections within a PCB editor can complicate the routing task and require additional time or layers to route. Declaring which pins or sub-parts can be swapped within a project or symbol library creates many opportunities to eliminate crossovers. Using interactive or automatic swapping capabilities greatly reduce the number of crossover connection within a design.