Let’s face it, when it comes to via structures in printed circuit board design, it’s easy to get lost in the jargon. Stacked vias, staggered vias, filled vias, via-in-pad, blind vias, buried vias... The list goes on. With all the focus on miniaturization and high-density designs, it’s tempting to default to the smallest, most compact option. But here’s the reality: if your via structure isn’t chosen with reliability and manufacturability in mind, you may be solving one problem and creating three more.
This isn’t a deep dive into Ultra HDI processes or sub-2 mil via diameters. We covered that in a previous post. This is about stepping back and asking, "What kind of via structure makes sense for this board, this material set, and this fabrication process?"
Designing printed circuit board vias is not a one-size-fits-all decision. What works in a six-layer automotive radar board doesn’t translate directly to a rigid-flex medical device or a multilayer communication module. And what looks great in CAD might be a headache (or even a deal-breaker) in fabrication.
Via-in-pad? Great for BGAs with tight pitch but be prepared for copper filling and planarization.
Staggered micro vias? A go-to for HDI builds with more routing freedom.
Stacked vias? Useful for tight spaces, but they require copper filling and plating reinforcement for reliability.
The takeaway? Pick the via strategy that fits your routing needs and your fab partner’s capabilities.
We all want high-density designs that use space efficiently. But if you’re not thinking about the via’s reliability during thermal cycling, reflow, and field operation, you might be inviting trouble.
A reliable via is:
Don’t just chase smaller vias. Chase better vias, and be sure that your fabricator has the capabilities to meet the option you are favoring.
Here’s a simple framework:
When should you move to stacked vias or micro vias? When your design constraints demand it and your layout can’t achieve performance or density otherwise.
If you're just trying to save space but still using relatively large pitch parts, chances are you can get away with a more traditional strategy.
Copper-filled vias aren’t just for looks. They add structural stability, improve thermal performance, and eliminate voids that can compromise solder joints in via-in-pad applications.
But copper filling also adds cost and time. It requires specialized equipment and must be factored into your stack-up and lamination planning. Not all fabricators offer it in-house.
Tip: Only specify copper-filled vias when the application demands it, like stacked vias, thermal-critical zones, or high-speed signal paths. Otherwise, stick with resin-filled or tented vias where appropriate.
As you move into thicker stack-ups or tighter designs, note that a via with higher aspect ratio will be harder plate reliably. The maximum aspect ratio allowed for a via will be a function of the drill diameter used to fabricate the via. Most fabricators are comfortable up to an 8:1 aspect ratio for mechanical drills down to 6-8 mil diameter vias, but larger diameter vias can have higher aspect ratios.
If you are using very small vias (6 or 7 mil) or if you need stacked/staggered/HDI vias, talk to your fabricator before finalizing your via strategy, especially when starting out with a new via structure. They know what works in their process. They can tell you if stacked microvias are realistic or if you’re pushing the plating limits too far. They might even suggest a lower-cost alternative that meets your performance goals.
A quick call or email early in the design process can save days, or even weeks, in prototyping and rework.
Via design isn’t just about squeezing more connections into less space. It’s about building a structure that supports your design goals and holds up in manufacturing.
So next time you’re working through your layer transitions, stop and ask:
The best via isn’t always the smallest, it’s the one that gets your board built right the first time.
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