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Learning Hub Webinars Beyond Length Matching: From Controlled Impedance to DDR4/DDR5 Signal Integrity Verification

Beyond Length Matching: From Controlled Impedance to DDR4/DDR5 Signal Integrity Verification

Length matching is only one part of a successful DDR interface. Controlled impedance, discontinuities, loss, and other layout effects can influence signal behavior. The correct electrical design target, including controlled impedance, is not always obvious from the standard or routing rules alone. 

In this practical session, we will work through a DDR4/DDR5 design and show how to approach SI verification directly within the PCB design workflow. 

Rather than focusing on individual features, the session follows the engineer's actual problem-solving process: identify what needs to be checked, prepare the design for analysis, examine the results, understand what they mean, and determine what should change in the PCB. 

Using Signal Analyzer by Keysight within Altium Designer, we will demonstrate how integrated analysis can provide additional insight into high-speed signals before the design reaches prototype or physical validation.

What You'll Learn

  • Identify what matters in a DDR4/DDR5 design: Understand which signal integrity questions should be investigated beyond basic routing and length constraints. 
  • Prepare the design for meaningful analysis: See how stackup, nets and other design data affect the quality of the analysis. 
  • Evaluate critical signal behavior: Use Signal Analyzer to examine impedance and other relevant characteristics such as delay, insertion loss, and return loss on routed DDR signals. 
  • Turn results into design decisions: Learn how to interpret analysis results, identify potential root causes of SI problems, and determine what PCB changes should be considered. 
  • Understand when deeper analysis is needed: See where integrated design-stage analysis can support engineering decisions and when a more specialized verification approach may be appropriate. 

Why Attend?

  • Follow a real engineering workflow rather than a product feature walkthrough 
  • See signal integrity analysis applied to a practical DDR4/DDR5 design 
  • Learn how to move from an electrical analysis result to an actionable PCB decision 
  • Understand what design information is needed before electrical analysis becomes meaningful 
  • See how Signal Analyzer fits naturally into the Altium Designer workflow 
  • Ask questions directly during the live Q&A 

Who Should Attend?

  • PCB Designers working with  high-speed digital interfaces like DDR4/DDR5 
  • Hardware Engineers responsible for board-level signal and power integrity 
  • Technical Leads and Principal Engineers looking to introduce earlier electrical verification into the design process 
  • Engineers using Altium Designer who want a practical understanding of Signal Analyzer  
  • Engineering teams looking to reduce reliance on late-stage troubleshooting and better understand design behavior before prototype 

Reserve Your Spot

Join us for a practical walkthrough of DDR4/DDR5 signal integrity analysis and see how to move from design data to electrical analysis, interpretation, and an informed PCB design decision. 

Author

Author

Alexsander joined Altium as a Technical Marketing Engineer and brings years of engineering expertise to the team. His passion for electronics design combined with his practical business experience provides a unique perspective to the marketing team at Altium. Alexsander graduated from one of the top 20 universities in the world at UCSD where he earned a Bachelor’s degree in Electrical Engineering.

More content by Alexsander Tamari

Author

Author

Martin Malenica has a masters in electronic and computer engineering at the University of Zagreb. His previous experience consists of multiple embedded systems positions at robotics start-ups (Gideon with USD 35m in Seed and Series-A funding) and SMEs. His engineering strengths lie in system architecture, PCB design and embedded programming. Aside from engineering, Martin has spent the last 1.5 years working at a leading European management consulting firm, where he focused on strategies to support large OEMs and Tier-1s regarding the current semiconductor shortage across the whole EMEA region. Martin has practical experience within AD, but also a good understanding of competitor tools, especially on the procurement and supply chain side, like Everstream, Resilinc, Silicon Expert, Z2Data etc. Martin Joined Altium in 2023 as part of the Technical Sales team in Germany.
 

More content by Martin Malenica

Author

Author

Francesco holds a Master's degree in Electrical Engineering from EPFL, Switzerland. He is currently part of the Field Applications Engineering team at Altium. During his studies, his primary focus was on bioelectronics and the microfabrication of biomedical implants. After graduating, Francesco transitioned into a technical sales role with a global supplier and manufacturer of custom magnetics, where he was responsible for both technical and sales discussions, serving as the liaison between design engineers, manufacturing engineers, and customers.

More content by Francesco Cecchetti

Author

Author

Aiden은 대학에서 전자공학을 전공하였으며 PCB 설계 분야의 R&D로 7년 이상의 경험을 가지고 있습니다. 그는 전자 제품을 위한 SMPS, 인버터, 컨버터 설계 경험이 있습니다. 제품 프로젝트를 이끌었으며 설계, 관리, 인증 제품 테스트와 같은 모든 작업을 경험했습니다. 그리고 한국 리셀러(Hancom Intelligence) 팀에서 4년 이상 Altium Designer 사용자들을 위한 기술 지원 및 교육을 제공했습니다. Concord Pro와 Altium 365를 사용하여 PLM 요구 사항에 대한 컨설팅 및 지원을 했습니다. 또한 Altium Designer에 대한 수십 차례의 교육 및 웨비나를 경험했습니다.
Aiden은 2022년 11월부터 Altium에서 기술 영업 엔지니어로 근무하고 있으며 현재 한국 사무소에 근무하고 있습니다.

More content by Aiden Oh

Author

Author

Daniel joined Altium in 2019 as an Application engineer and moved into the Technical Sales role in the same year. Daniel provides technical assistance for sales, third party distributors, and customers in the Asia Pacific region (APAC) and is based in the Altium Tokyo, Japan office. Daniel has experience with PCB,  FPGA, and ASIC design in telecommunication and Information industries. 
 

More content by Daniel Cho

Author

Author

After completing his master’s degree on the power system of a microsatellite in South Africa, he worked in the biomedical and automotive sport industries in the UK and the telecoms industry in Germany and Finland. Back in South Africa he worked in the mining, military and aerospace industries, finally finding his niche in the agricultural sector. With 30+ years experience, he loves the design and development of power supplies and battery 

More content by Rean Bootsma
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Beyond Length Matching: From Controlled Impedance to DDR4/DDR5 Signal Integrity Verification

Created: October 20, 2026
At a Glance
See how to investigate signal integrity on a real DDR4/DDR5 design and turn electrical analysis results into practical PCB design decisions.
Go Deeper with AI:
ChatGPT Perplexity Claude Gemini Grok
3 videos
  • Hosted by Alexsander Tamari - Technical Marketing Engineer
    00:28:12 • Nov 3, 2026
    Hosted by Alexsander Tamari - Technical Marketing Engineer
    00:28:12 • Nov 3, 2026
  • プレゼンター:ダニエル チョウ
    00:45:39 • Nov 4, 2026
    プレゼンター:ダニエル チョウ
    00:45:39 • Nov 4, 2026

    実際のDDR4/DDR5設計でシグナルインテグリティーを調査し、電気解析の結果を実用的なPCB設計上の判断に活用する方法をご覧ください。

  • 오힘찬 FAE 발표
    00:24:24 • Nov 4, 2026
    오힘찬 FAE 발표
    00:24:24 • Nov 4, 2026

    실제 DDR4/DDR5 설계에서 신호 무결성을 조사하고 전기 분석 결과를 실질적인 PCB 설계 결정으로 전환하는 방법을 알아보세요.

Product: Webinars Altium Agile Teams Simulation and Analysis Signal Integrity PCB Design Engineers Simulation Engineers
Other Recordings
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Length matching is only one part of a successful DDR interface. Controlled impedance, discontinuities, loss, and other layout effects can influence signal behavior. The correct electrical design target, including controlled impedance, is not always obvious from the standard or routing rules alone. 

In this practical session, we will work through a DDR4/DDR5 design and show how to approach SI verification directly within the PCB design workflow. 

Rather than focusing on individual features, the session follows the engineer's actual problem-solving process: identify what needs to be checked, prepare the design for analysis, examine the results, understand what they mean, and determine what should change in the PCB. 

Using Signal Analyzer by Keysight within Altium Designer, we will demonstrate how integrated analysis can provide additional insight into high-speed signals before the design reaches prototype or physical validation.

What You'll Learn

  • Identify what matters in a DDR4/DDR5 design: Understand which signal integrity questions should be investigated beyond basic routing and length constraints. 
  • Prepare the design for meaningful analysis: See how stackup, nets and other design data affect the quality of the analysis. 
  • Evaluate critical signal behavior: Use Signal Analyzer to examine impedance and other relevant characteristics such as delay, insertion loss, and return loss on routed DDR signals. 
  • Turn results into design decisions: Learn how to interpret analysis results, identify potential root causes of SI problems, and determine what PCB changes should be considered. 
  • Understand when deeper analysis is needed: See where integrated design-stage analysis can support engineering decisions and when a more specialized verification approach may be appropriate. 

Why Attend?

  • Follow a real engineering workflow rather than a product feature walkthrough 
  • See signal integrity analysis applied to a practical DDR4/DDR5 design 
  • Learn how to move from an electrical analysis result to an actionable PCB decision 
  • Understand what design information is needed before electrical analysis becomes meaningful 
  • See how Signal Analyzer fits naturally into the Altium Designer workflow 

Who Should Attend?

  • PCB Designers working with  high-speed digital interfaces like DDR4/DDR5 
  • Hardware Engineers responsible for board-level signal and power integrity 
  • Technical Leads and Principal Engineers looking to introduce earlier electrical verification into the design process 
  • Engineers using Altium Designer who want a practical understanding of Signal Analyzer  
  • Engineering teams looking to reduce reliance on late-stage troubleshooting and better understand design behavior before prototype 

Author

Author

Alexsander joined Altium as a Technical Marketing Engineer and brings years of engineering expertise to the team. His passion for electronics design combined with his practical business experience provides a unique perspective to the marketing team at Altium. Alexsander graduated from one of the top 20 universities in the world at UCSD where he earned a Bachelor’s degree in Electrical Engineering.

More content by Alexsander Tamari

Author

Author

Daniel joined Altium in 2019 as an Application engineer and moved into the Technical Sales role in the same year. Daniel provides technical assistance for sales, third party distributors, and customers in the Asia Pacific region (APAC) and is based in the Altium Tokyo, Japan office. Daniel has experience with PCB,  FPGA, and ASIC design in telecommunication and Information industries. 
 

More content by Daniel Cho

Author

Author

Aiden은 대학에서 전자공학을 전공하였으며 PCB 설계 분야의 R&D로 7년 이상의 경험을 가지고 있습니다. 그는 전자 제품을 위한 SMPS, 인버터, 컨버터 설계 경험이 있습니다. 제품 프로젝트를 이끌었으며 설계, 관리, 인증 제품 테스트와 같은 모든 작업을 경험했습니다. 그리고 한국 리셀러(Hancom Intelligence) 팀에서 4년 이상 Altium Designer 사용자들을 위한 기술 지원 및 교육을 제공했습니다. Concord Pro와 Altium 365를 사용하여 PLM 요구 사항에 대한 컨설팅 및 지원을 했습니다. 또한 Altium Designer에 대한 수십 차례의 교육 및 웨비나를 경험했습니다.
Aiden은 2022년 11월부터 Altium에서 기술 영업 엔지니어로 근무하고 있으며 현재 한국 사무소에 근무하고 있습니다.

More content by Aiden Oh

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Watch Video
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Read Documentation
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Altium's MCAD CoDesigner technology connects the mechanical and electrical design domains, allowing the mechanical and electronic engineers to pass the loaded PCB back and forth between the two domains. In your Altium design software, this is achieved through an extension that loads and extracts board and component data from the PCB editor, the MCAD CoDesigner extension. In the MCAD software the…

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Requirements Portal is under continuous development. This page outlines new features and enhancements made to Requirements Portal in key updates. 2.60, at the release: remove the box below, leave the content. Update - 12 November 2026 Simple Start In this release, the concept of Simple Start has been implemented in order to make establishing a requirements project easier and make the required…

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The refresh token flow is a more secure way to authorize API requests. Instead of using a single long-lived credential directly, you exchange a refresh token for a short-lived access token. When that access token expires, you exchange again. Note that the refresh token cannot be used by itself to authorize API requests; it always has to be exchanged for a refresh token first. To use this flow,…

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