All About ORANs: A PCB Designer's Guide to Open Radio Access Networks

Zachariah Peterson
|  Created: January 29, 2021
OpenRAN

2020 was the year of a pandemic, a stock market crash and recovery, advances in quantum computing, and tentative 5G rollouts. Among all of these strange events in history and advances in technology, buzzwords and acronyms from the telecom world became ever more prominent in the technological lexicon. “Open radio access network” is one of terms that is transcending buzzword status and is enabling new technologies through an open hardware, firmware, and software architecture.

Open radio access networks are part of the ongoing revolution in radio networks towards interoperability. The idea is to create open-access networks without the need for carrier interoperability agreements, such as we’ve had in the era of LTE. This is more than just a change in the network’s software architecture, it’s a new way for hardware platforms to interact with radio networks, including future 5G specifications.

The Many OpenRAN Architectures

Today, telecom operators need diversity in the hardware, vendors, and software required to build and run their networks. Open radio access networks, or ORANs, intend to provide this diversity by ensuring interoperability among chipsets, software, and other off-the-shelf hardware. This is both a hardware challenge and a software/firmware challenge; the hardware needs to meet performance and testing requirements in ORAN specifications, but there is also the applications layer that links everything together. There are real benefits to using an open architecture, specifically modularity, lower R&D costs, and compatibility with off-the-shelf hardware.

Although the basic goal of open radio access networks is rather simple, there are a few open radio access network initiatives and acronyms. In particular, the phrase “open radio access network” could refer to one of the following acronyms:

  • Open RAN, or its acronym ORAN, is a generic term that can refer to any open radio access network.
  • O-RAN refers specifically to the O-RAN Alliance, which releases RAN specifications, open software for ORANs, and supports its members in integration and testing of their implementations.
  • OpenRAN refers to the Telecom Infra Project, an initiative to define and build 2G and later ORAN solutions from vendor-neutral hardware with software-defined technology.
  • OpenRAN 5G NR is a project group of the Telecom Infra Project that focuses specifically on building ORANs based on 5G NR technologies.

The O-RAN Alliance is perhaps the most promising organization moving towards 5G interoperability. The organization has released specifications on everything from testing and integration, to white-box hardware requirements and application stack requirements. The organization has also released a slew of reference designs for anyone developing base station equipment. To download their specifications and reference design literature for free, visit the O-RAN.org website. Other companies like Keysight and Xilinx are developing product portfolios specifically targeting ORAN devices.

The semiconductor industry has done an excellent job ensuring general-purpose interoperability among ICs through implementation of standardized digital interfaces. You know that different chips from different vendors are compatible or can be made compatible simply by matching up interfaces between them. Hardware designed for use in ORANs is meant to achieve the same goals, but it has an added level of firmware and software design, while still operating within the standard cellular network architecture (see below).

OpenRAN architecture
ORANs have the same architecture as a traditional cellular network. Base stations receive signals from user equipment (UE) and transmit data over backhaul to the core network.

PCB Design Challenges in ORAN Hardware

ORAN hardware systems are either high speed, high frequency, or both, and building these systems requires understanding mixed signal design with an eye towards signal and power integrity. In addition, these systems need to be deployed in the field and maintain perpetual uptime, meaning compliance with rugged design requirements (at least Class 2) is in play.

Some of the high-speed interfaces involved in a typical ORAN product can include:

  • PCIe: Primarily for communicating between host processors and peripherals. Reference designs from O-RAN cite cases involving multiple lanes in parallel with on-board data transfer reaching about 100 GT/s.
  • DDR3 and higher: Obviously, this is used to access on-board memory. Some reference designs show speeds at 2667 GHz over DDR4.
  • Ethernet: Another obvious interface you would expect in base station systems and other fronthaul/backhaul equipment, which is used to interface with other networking equipment, both over copper and fiber.
  • High-speed SerDes channels: Serial data transfer between important components at high data rates is specified over multiple interfaces via SerDes channels; equipment requiring connected high-resolution displays (e.g., HDMI) is one example.

From the above list, it should be obvious that ORAN products can be something close to an embedded edge server with potentially ultra-high frequency signals going to and from transceivers. Such an architecture is intended to support on-device telecom applications that require on-device network management, including embedded AI applications. In the absence of a new class of general-purpose processor, most reference designs specify using FPGAs and x86/ARM CPUs as host/peripheral controllers.

Finally, there is the RF section of some ORAN products that may need to interface directly with the analog front-end. This is where your board arrangement becomes critical as things like mixed-signal crosstalk, return path planning, and distortion of the analog signal become critical. In one recent client engagement, my team was able to overcome some of these challenges in a client project using substrate integrated waveguide routing, which has major isolation advantages in an electromagnetically noisy environment.

Another option to ensure RF signal integrity is to take a cue from 4G/5G handsets and place printed isolation structures directly on the PCB. These can be difficult to design, but working at 5G frequencies requires that extra isolation to ensure signal integrity. To learn more about routing and layout when working at 5G frequencies, I'd recommend watching Mike Creeden's 2019 AltiumLive presentation.

When new technologies like OpenRAN architectures start to dominate the technological landscape, we'll be here to give you the design guidance you need. The schematic design, simulation, and PCB layout features in Altium Designer® can help you build the type of open hardware platforms demanded by open radio access networks. The updated simulation UI in Altium Designer 21 is key to building and optimizing your subsystems in your new hardware platform.

When you've finished your design, and you want to share your project, the Altium 365™ platform makes it easy to collaborate with other designers. We have only scratched the surface of what is possible to do with Altium Designer on Altium 365. You can check the product page for a more in-depth feature description or one of the On-Demand Webinars.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 1000+ technical blogs on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, and the American Physical Society, and he currently serves on the INCITS Quantum Computing Technical Advisory Committee.

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