In this episode of the OnTrack Podcast, host Tech Consultant Zach Peterson explores the revolutionary world of Ultra HDI with Chrys Shea, President of Shea Engineering. The two unveil the future of PCB soldering and miniaturization, shedding light on the intricate challenges ahead and breakthroughs just on the horizon. Chrys, renowned for her expertise, shares invaluable insights into developing test vehicles for soldering and navigating the complexities of Ultra HDI assembly. This conversation promises a deep understanding of the cutting-edge advancements shaping the future of electronics manufacturing.
Don't miss out on the expert guidance and innovative strategies presented by Chrys Shea, a leading voice in the SMT assembly and PCB design world.
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Zach Peterson: What's the plan? Is there a plan or is it just we're gonna do some experiments and see what happens?
Chrys Shea: It's called beat the tar out of the process engineer until they get the defects down. The whole point in my mind being a DFM disciple is to have the discussion upfront with the designers so we know what to expect.
Zach Peterson:Hello, everyone, and welcome to the Altium OnTrack podcast. I'm your host, Zach Peterson. Today, we'll be talking with Chrys Shea, president of Shea Engineering. Chrys is involved in developing test vehicles for soldering. And I'm very eager to learn about what she does and some of the work she's doing involving UHDI. Chrys, thank you so much for joining us today.
Chrys Shea: Thank you, Zach, for having me. I really appreciate the opportunity.
Zach Peterson: Absolutely. We're happy to have you here. I've said many times, I've been trying to make it my point to learn a bit more about what happens with manufacturing beyond just DFM, so I'm really excited for this.
Chrys Shea: Excellent. I studied DFM in grad school, so I've been a disciple from Boothroyd Dewhurst for the last 35 or 40 years, so I love this stuff.
Zach Peterson: Awesome. That's great. If you could, just tell us what it is you do.
Chrys Shea: I've been an SMT assembly process engineer since 1990, so I've gone from 25 mil pitch to copper pillars and it's been a great, great journey. I spent my first 20 years in the industry, roughly 10 on the user side, running assembly lines and NPI lines and doing DFM and the next 10, working on the supplier side, developing materials and new processes. And 15 years ago, almost 16 now, I decided to strike out on my own. And I've been an independent consultant ever since. Now, I've been given the moniker, the queen of soldering and I don't take that lightly. I'm very appreciative of that.
Zach Peterson: Well, your highness. This is interesting. I didn't know that there were SMT soldering consultants. I didn't even know that was a thing.
Chrys Shea: It's kind of a niche. I don't advertise. I don't do any marketing. I don't do any sales. It's more or less word of mouth and it's been really, really fulfilling for a long time now.
Zach Peterson: That's awesome. That's awesome. It's always great when you can strike out on your own and really do something that you want to do and get that recognition.
Chrys Shea: The passion, the passion for making solder joints. I love making solder joints.
Chrys Shea:: I feel it.
Zach Peterson: I feel it. So one of the things that I saw that you do is develop test vehicles for soldering. Is that correct?
Chrys Shea: Yes, yes.
Zach Peterson: And you were recently involved in creating a rather complex text vehicle for UHDI assembly?
Chrys Shea: Yes, indeed. What we did with it was we developed a test vehicle for solder paste printing several years ago, probably five, six years ago. We introduced it 2019. And it was originally used for solder paste printing tests and it embedded 25 different paste tests into one board. So an assembler can, within half a shift, decide whether or not this is the right paste. And you can rank them all on a scale and pick the best paste for their assembly operation. And also know going in what the trade-offs were. So since we introduce that as a simple solder paste test vehicle, we've used it for paste printing, evaluating stencils, evaluating all the new nano coatings that have come out, evaluating the new types of squeegees that have come out, looking at how thin we can go on a fab before we need solid board support, looking at how we under wipe the stencil, the different types of solvents we can use, that's printing. Then we go to placement, and this has been used to develop 01005 and oh 008004 assembly processes. And you notice I say, oh-oh, instead of oh-oh because when you see amount of bill of materials, we all go oh-oh, 008004s. We've also used it to prove 0.4 millimeter BGA capability. And an interesting one that I got feedback on recently was placement rate verification because in the SMT placement world, we have placement rates per IPC standards and everybody does their test a little bit differently. So these guys took the board. And we do a thing where we put sticky tape on double-sided sticky tape and place away and then verify the placement. So we're able to verify placement rates and placement locations. Then when we get to reflow. We've used it for voiding on bottom termination components, QFNs, transistors, and the 008004s, which are now in your telephone. And we've also used it to develop a lot of design rules, mask versus metal-defined pads based on feature size, square versus circular pads, optimizing our aperture designs for these small pads. So personally, we've done a whole lot with it and a lot of the large CEMS and OEMs have adopted it to use as their test vehicles. Sometimes they modify it, the paste labs use it. So it's gotten a lot of mileage, but it was originally designed for the three to five year timeframe and we've reached that timeframe. So it was time to spin it.
Zach Peterson: Okay.
Zach Peterson: And that's how it comes to the Ultra HDI.
Chrys Shea: Sure. And now that we get down to 25 mil line and spacing, I'm sure that creates a couple of challenges, right? One would be density and then what's the other challenge? Maybe let's say pad sizes.
Chrys Shea: Pad sizes and density. You hit them both right on the head because, well, if I give you the good news, bad news, the good news for assemblers is we haven't gotten any components smaller than the 008004s. The bad news is we're packing them and greater quantities and higher densities, and we're even taking those tiny little pad sizes and shrinking them even below IPC min, max material condition to fit them all on the board. So what Ultra HDI is bringing to assembly is just a lot more of the same challenges in greater quantities. I've been an SMT process engineer for 35 years. The three certainties in my life are death, taxes, and miniaturization. It's been coming for 35 years and it will keep coming. And it's what keeps us, I don't know, intrigued, employed, and inspired, I guess.
Zach Peterson: Now, this is interesting. You mentioned that pad sizes being shrunk down, IPC minimums under which standards is that? I think 7351.
Chrys Shea: 7525.
Zach Peterson: So was IPC not anticipating this or do they always just wait for people to do stuff and then develop the standard later?
Chrys Shea: Well, because the standards are developed on experience, we have to get the experience before we can develop the standard. It's sort of a chicken in the egg.
Chrys Shea: And then in the test board, if you could just hold it up for us for just a moment 'cause you flash it on screen briefly. I want to give people just a quick view and maybe a description of what we're seeing here. But what we're seeing here is it looks like we have a lot of different components. I'm assuming there's no routing, but we have pads and everything for a lot of different components, all kind of grided out and lined up in their own areas. What are some of the components that are on here? I know you mentioned really small SMD passives, but it looks like there's probably some spots for maybe QFNs.
Chrys Shea: Yes. These are 05 BGAs 0.5 millimeter pitch. These are a little tough to see. They're 0.4 millimeter BGAs. And coming down the side are 0.3 millimeter BGAs. Then in here, we've got 0.4 QFN, which is the finest pitch we can get. And it was a legacy board where we had some 1206s, some 0603s, some 0402s, all of which have been removed for the next version. We've got 0201s, 0105s, and our favorite 0804s. Now, this board was good for testing pace, but it really didn't push the miniaturization levels. The way the new board pushes the miniaturization levels or the packing density levels.
Zach Peterson: Okay. I encourage anyone who's listening on audio to come over to YouTube and check this out so they can actually see what one of these boards looks like.
Chrys Shea: And if you want to see a good picture of it, sheasmt.com. If you go to SMTA board, there's some nice pictures of the top and bottom sides.
Zach Peterson: There we go. Perfect. One thing I'm wondering here is we're talking about a test vehicle that seems like it's seen pretty extensive use over the last several years. How common is it for a manufacturer to use these kinds of boards to maybe qualify their process either for high volume or high complexity manufacturing?
Chrys Shea: The big CEMs, the top tiers all have their own internal test vehicles. The tier two on down generally don't. So to buy this board for roughly $30 is way more economical than using one of your own production boards. And it has a lot more tests in it. There's actually 25 different solder paste tests and DOE is embedded in that design. So it's quicker, it's cheaper, and it's more efficient. What's not to love?
Zach Peterson: So that's interesting. They're using a test vehicle, but I would think, at least for quality control, they might actually use one of the production boards or maybe just the surface layers from a production board because they don't need all the internal routing. They really just need the pads if all they're trying to do is qualify soldering, is that correct?
Chrys Shea: Exactly, exactly. And these are actually routed out to gold fingers. They're all daisy-chain components and they're routed out to gold fingers. So you can put it in a thermal cycling chamber to prove out your soldering process.
Zach Peterson: Got it, got it. Okay. So it sounds like pretty much every assembler is going to need some kind of test vehicle in order to prove out their process at some level and then they can reliably go to their customers and say, Hey, we can do 0201s, 0105s.
Chrys Shea: Exactly, exactly. And it's a lot easier to do it on a test vehicle than on your customer's board, which may be consigned or your own miniaturized board, which we know are more on the higher cost range than your standard boards. So it just makes sense for a lot of people to use this. And sometimes we use it to gauge a process to see how fine a pitch a contract manufacturer can go. Maybe they're qualified at 05 BGA, their marginal at 04 and they have no capability at 03. So it's good to be able to benchmark that so they can communicate better with their OEMs as to what their capabilities are or where they need to improve.
Zach Peterson: So now in the new test vehicle, the new test vehicle, it sounds like, is really kicking up the density into a new level, right? We already hit 008004, now it's really packing them into a small space. So what does this new test vehicle look like?
Chrys Shea: Let me share my screen.
Chrys Shea: Okay.
Chrys Shea: And show you what we've got cooking here. Right now, I'm referring to this as the mechanical because we've only got our top layers and we'll share the vision for the inner layers. Can you see this now? This is our new SMTA test vehicle to see. We're now up to revision 2.3 from 2.1.
Zach Peterson: So really, really quick for everyone that's out there listening on audio, we see same kind of thing. We have groupings of components in different regions of the board. Again, it looks like a lot of those same kind of components. And I even see what looks like some rotation of some of those groups of components.
Chrys Shea: Yes. Miniaturization is bringing us a lot more, what we refer to an assembly as off-axis placement. Most of our placements historically have been at zero or 90 horizontal or vertical. But as we get into denser and denser packaging, we're seeing a whole lot more at 45s, a few here at 30 and 60 degrees, but we didn't put them on the board. And there's always that odd angle somewhere where only 17 degrees would fit. The issue with the off-axis placements is not necessarily the printing or the placement or the reflow. Those are all still pretty straightforward. But we get into trouble when we get this dense packing and these off-axis placements and we look for automatic inspection. The automatic optical inspection was not developed over the years for off-axis placement. So we run into things like shadowing and we have small components. So this is gonna help us refine our algorithms moving forward.
Zach Peterson: I see, I see. Okay. So what kinds of things do we have on this board here? It looks like along the top we have some of the BGAs.
Chrys Shea: Yes. And let me explain a little bit why some of these layouts look a little curious to us. There's a situation in stencil printing solder paste that we call the leading edge effect. The first few pads and any stencil squeegee stroke direction always have a huge amount of variation, much more than the third or fourth row of pads. And that's because we have to get that pace rolling and sheared down and we just don't get it sheared down enough until we hit the first few rows. So we've documented the leading edge effect. Some of the stencil printer companies have put in features to try to overcome it. But what we're doing here is we're staggering the BGAs and putting dummy pads in front so we can absolutely quantify the leading edge effect. And once we quantify it, then we can address it through stencils, through squeegees, through machine variables. So this is the first test vehicle we've got where we can really zero in on that leading edge effects. So you'll see we've got 1, 2, 3, 4 of these 04 BGAs right where we'd put them at the leading edge. And we've offset these three and added the dummy pads. And what we'll end up seeing when we print this is A1, row A on this device will print far better than row A on that device. How much? That's what we're gonna find out when we start running this.
Zach Peterson: If I could, when you say better, print better, what exactly does that mean?
Chrys Shea: And printing the name of the game is reducing variation.
Zach Peterson: Got it, okay.
Chrys Shea: When we look at our solder paste deposit volumes, we want them to all be within... We use what we call a coefficient variation. We want everything to be within 10% of the mean. And that means our process and control. If we get variations that are over 15% of the mean, it means our process is out of control. When we're doing things this small, we need our process and control.
Zach Peterson: Sure. So that that top row in these BGAs where it's along the deposition direction, those would get hit first.
Chrys Shea: Yes.
Zach Peterson: Those better just means that row looks a lot more like all the other rows. Yeah, so what we have here on screen is a couple of graphs. We have a bar chart and we have a line chart that I guess is quantifying the variation due to the leading edge effect on BGAs.
Chrys Shea: Exactly. And this was on 0.4 millimeter BGAs from the old version of the board. Now that we have a new version, this is suddenly the old one. And you can see row one, when it came to solder paste deposition, it was a little lighter than row two or row three. These were with different wipes, but also you see the variation on row one, even the best was out of control. We were at about 18%. This is 25% variation, this is 30% variation. When we get down to row three, we're back pretty much in control. We want less than 10, we're okay with less than 15. So we've got the green and the yellow dots there. So that really illustrates that first row is out of control. The difference in deposits is too great. And we're gonna end up with either opens or shorts, mostly opens in that first row. Once we get to the third, we're in really good shape.
Zach Peterson: So is the message here to the designer to basically say, hey, designer, you need to add at least two rows of dummy pads along that printing direction? Or is this something the-
Chrys Shea:Oh gosh, if only I could.
Zach Peterson: Is this something the assembler has to come in and do after the fact? 'Cause I could imagine a really complex, very dense board that comes in and is being reviewed and somebody says, "Hey, designer, you need to add these pads here." Oh, I'm sorry, that means these 50 components now need to move back by a millimeter, which when you're in the HD... I mean, even in the standard complexity region can be a game changer for you.
Chrys Shea: Yeah, yeah. I can ask, but I know I'm not gonna get. So what we do in the printing domain is, as things get dense, we're really starting to witness more and more. This has been, shall I say, process engineer lore for at least 10 years. And now we're seeing it more and more. So now we're testing for it more and more. We can't add pads. Gosh, if only we could. What we do is things like speed up the squeegee speed until we get to the print area, so we get a little bit more sheer going, or we start the squeegee moving farther away from the print area so we can get a little bit more movement and get a a little bit more shear in it. And I've actually got an idea that I can't share yet, but there's a solution to that problem here. If I just close it, I won't be able to patent it. So we'll talk about that in a little while.
Zach Peterson: Okay. Okay. After you get that patent, let's have you back on to talk about it for sure because it sounds interesting.
Chrys Shea: All right.
Zach Peterson: So one thing I noticed in the test vehicle was those BGAs. Most of that center area is carved out in the test vehicle and there are no pads. But if you look at most BGA components, they actually fill the entire underside of the package with pads. So why was the test vehicle designed such that that central square of pads was omitted?
Chrys Shea: That is designed that way because we are using dummy components and this is how the dummy components are designed. Trust me, when we look at three rows on a periphery or actually this is the one, four rows on a periphery, that's enough for us to handle. If we come over here and look at the 03 BGA, you see a lot more density and you also do see the pads in the iOS in the middle.
Zach Peterson: I see. Okay. So I was looking at the wrong BGAs.
Chrys Shea: Well, we see all different kinds of BGAs. It just depends. But for our intents and purposes, because we want to show electrical continuity, we need to use the daisy-chain ones.
Zach Peterson: Yeah, this is very interesting. And then I see you also still have the gold fingers going along the edges as well.
Chrys Shea: Yes. Yes. So most of these components have a single daisy chain that routes out to the gold fingers because these are so challenging, they actually have two daisy chains, one for the inner array or perimeter array and one for the inner array. Because what we do is we put these in chambers, we thermally cycle them, we monitor the resistance, and we can predict when a joint is cracking.
Zach Peterson: Really?
Chrys Shea: Yes.
Zach Peterson: Okay, just by watching the resistance in real time.
Chrys Shea: Yes, yes. Because as the crack pop propagates through the joint, the cross-sectional area that's conducting the electricity, gets smaller-
Zach Peterson: Starts to go down.
Chrys Shea: And it's back to your high school physics from there.
Zach Peterson: Okay, that makes sense. That makes sense. So that would only be for joints on the surface, right? That's not like an internal feature like a microvia.
Chrys Shea: No, it's not. But you just hit on the beauty of this redesign and using the daisy chain. When we daisy chain these on, you'll see all the connections are on the top layer right now and the other connections are made within the component. My vision for this board is we punch through vias and pads, we put some blind vias in, we connect internally and maybe even through some buried vias and then come back up to the pads. So instead of having this one little trace tying these, we'd actually punch through, go through the insides of the board and punch back up, replacing the surface.
Zach Peterson: Right. So for anyone who's listening on audio, we do have small traces connecting neighboring pads. But what you're talking about is let's get rid of the traces, let's throw some microvia in pad in there.
Chrys Shea Indeed.
Zach Peterson: And possibly even stack blind and buried microvia in pad.
Chrys Shea: Yes. Yep, yep, yep, yep, yep, yep. The world is our oyster. We can try all different kinds of things. Ideally, I'd like to try one type of connection on one perimeter with array and then another type in the next and another type in the next 'cause that will be easier for us to find out where our opens show up.
Zach Peterson: Right. 'Cause then, I guess, somebody could do like, you know, there's just one line along the board where they would need to cut to do a micro section.
Chrys Shea: Yes, yes.
Zach Peterson:I see. Okay. So you've now you've got, let's say, 25 different micro section tests built into a single part of the coupon.
Chrys Shea: It's beautiful, isn't it?
Zach Peterson: Yeah, yeah. That's really cool.
Chrys Shea: One of the things we do is design a lot of DOE and exploration opportunities into these test vehicles.
Zach Peterson: Do you get requests for like custom test vehicles?
Chrys Shea: Yes, we do. I see SMTA's logo is on here, but I could imagine... Let's say Lockheed Martin wants their own test vehicle. Raytheon wants their own test vehicle.
Chrys Shea: I've worked with a number of assemblers on the original test vehicle. When they want customization, we're able to do it. And if you look right here in this big open space I'm showing, we call that green acres.
Zach Peterson: Green acres. Okay.
Chrys Shea: Green acres. So we can put anything anybody wants down there. The SMT logo on the board, we have a royalty agreement. 10% of the purchase price of any of our boards goes to the SMTA to foster the next generation of engineers for workforce development and student young professionals. So we're really proud of that because we love bringing the young kids up.
Zach Peterson: Yeah, yeah. I think it's extremely important and I think that's great that you're doing that. One thing here also on the left, again, for anyone who's listening on audio, there looks like a section here on this board that is separated from the main board using some mouse bytes. Why do you have this other breakaway section on this test board?
Chrys Shea: This is really cool. Surface installation resistance becomes more and more important as feature sizes shrink and biases increase. So in short, surface insulation resistance is the conductivity of your flux residues or any residues that were left behind. When we're using high speed signals, we can get a lot of crosstalk. When we're in harsh environments, salt, fog, things like that. We can get dendritic growth, particularly in humid environments. So we've got some IPC test coupon designs for surface installation resistance, but they're indicative of our industry 10 to 15 years ago. Now that we're getting into miniaturization and 25 micron space and trace, we have to rethink our SIR comms. So what we've done is reserved this space on both sides of the board for some developmental surface insulation resistance tests. And while you can't see them on this side, the backside of this tab is gold fingered so that we can plug them into the SIR chambers, run them under heat, humidity, and different biases, and monitor the continuity, and see when we get the shorts.
Zach Peterson:I see. Okay, that makes perfect sense. I was even kind of envisioning in my mind, once you start doing microvia and pad, that could also be its own breakaway region. That way you could just micro section that part of it while leaving the rest of it intact.
Chrys Shea: Yes, yes, we can. Indeed.
Zach Peterson: Okay. Makes a lot of sense. So I think as more of the UHDI packaging capacity comes back stateside, a lot of fab houses are gonna, of course, trying to be upgrading their capabilities to take advantage of that new market. And we're already seeing that a little bit. I mean, you have ASC and I think Calumet who have been going that direction and they're probably gonna look at MSAP or SAP as the advanced processing technique for fabrication. So where does a test vehicle like this apply in this area? Does it apply in the micro via and pad portion where you have to then fabricate those vertical interconnects?
Chrys Shea: It applies there. And actually, it applies in a number of other places too. If you look at these wafer level packages here, we cannot create those with a subtractive etch process.
Zach Peterson: Okay.
Chrys Shea: We can try, but we're not gonna do a good job at it. Okay. These things need to be made additive or semi additive. We've been working with ASC on some of these design elements and we plan on including a lot more as we move forward on the board.
Zach Peterson: Okay. So this is not just a PCB test vehicle. Now, this is really a packaging test vehicle as well.
Chrys Shea: Yes, yes. I'm looking forward to putting some internal Ultra HDI layers in here to checking microvias in pads, buried vias, blind vias, stacked buried vias. I think it's gonna be really, really illuminating for a lot of us. And we're talking about not just testing the fabrication process, but the different materials that come from the different laminate suppliers so we can understand which ones are more compatible than others when we start going higher levels of production on Ultra HDI.
Zach Peterson: Yeah, I totally glossed over the material end of it because I know that buildup materials are gonna become more important. I'm still kind of waiting for something to come around and replace... What is it? Ajinomoto buildup film for packaging. So this looks like the perfect vehicle to start testing some of that.
Chrys Shea: It is. And it's exciting because I know just enough about fabrication to be dangerous, but I'm really specialized in assembly, so now I'm getting my feet a little more wet in fabrication and Ultra HDI. And it's a wonderful learning experience for me, as well as probably everybody else in the industry. One of the things we plan on doing is, if I can zoom into these caps and resistors, these are also dummy components and we plan on electrifying these. Right now, we have test points so the assembler can ohm them out and see if they got all their joints right. But what we want to do is punch down into the board, we're going to add a battery and some LEDs. So you can instantly tell if your fabrication and your assembly works. It's kind of like a mini in-circuit test on board.
Zach Peterson: Oh, I see. So they would have the board powered up and while it's running, they could see the LEDs.
Chrys Shea: Yes. That will tell you if you assembled it properly, it'll also tell you if you fabricated it properly. I think I really thought that was a good idea because it's a bit tedious to take a multimeter and start ohming these out. It's way more fun to push the switch and see what lights up. Come on.
Zach Peterson: Going back for a moment just to the microvia and pad, what sizes are you targeting? Because you mentioned going down to 0.3 millimeter pitch, right? And of course, that pushes the pad size smaller. I'm just wondering like how small would you plan on going with microvia and pad?
Chrys Shea: I would love to be able to answer that, but it's not in my wheelhouse. That is a question for John over at ASC.
Zach Peterson: So they're the ones that are picking the lasers and they're gonna know how fine they can drill.
Chrys Shea: Yeah, they're the fabrication experts, definitely.
Zach Peterson: Sure.
Chrys Shea: Yes.
Zach Peterson: It sounds like there's gonna be a test vehicle with the ASC logo and that's their test board for their fabrication, as well as assembly.
- Yes. In fact, at the Ultra HDI conference, you'll see an early prototype of this board that's been fabricated by ASC. that was in plating yesterday or the day before. So John's gonna be bringing them out to the Ultra HDI symposium with him. Wow, we should have him on to talk about it. That would be pretty interesting. All right.
Chrys Shea: Do you wanna see some of the other features we put on here? They're more assembly-related.
Zach Peterson: Yeah, absolutely. Love the show and tell session for sure.
Chrys Shea: Okay. Again, we call these flower power because when they're powered up, they will light up and they kind of look like flowers. If we move-
Zach Peterson: Oh, okay. So these are the arrays of-
Chrys Shea: Capacitors and resistors.
Zach Peterson: Yeah, capacitors and resistors. So it says caps minimum resistor, minimum, and then you have... It looked like six in total.
Chrys Shea: Yep. And then we have the nominal IPC footprints, the max material condition IPC footprints and the min material IPC footprints. And what I've found in previous studies is when we compare nominal max and min, obviously max gives you the best quality output. But if we're going for miniaturization, we can't use the maximum pads. We have to squeeze this in. So we've done tests on both resistors and capacitors and these sizes where we compare the three pad sizes. And even though max is great, it's just not feasible in most designs. The difference between max and nominal on defect rates is pretty small relative to the difference in defect rates between nominal and minimum. When you hit the minimum, you really jack the defect rates up. So what we've determined over the years is that nom is pretty much the best. If you had space for the max, you wouldn't be using these tiny parts. And what this is gonna allow us to do now is GFM rules is to determine on these smaller components. Do we need nominal? Do we need minimum? Can we make an educated decision when we're laying out our board, whether we wanna accept the higher defect rates or we wanna accept the lower real estate? Gonna give us a lot of insight into design for manufacturer.
Zach Peterson: Now about the jacking of the defect rates when you go to the minimum footprint size or pad size I should say, what exactly are those defects? Are these too little solder, too much solder? Is it too like tombstone or shifting that leaves an open?
Chrys Shea: We get tombstones, we get skews, we get midship solder balls, we get non-wets.
Zach Peterson: It sounds like there's just a complete list.
Chrys Shea: There is. There is. There's probably six different forms.
Zach Peterson: You get most of them, right?
Chrys Shea: Yeah, yeah. There's probably six different forms that we use of defects codes, so yeah. Gosh, I'm trying to remember back to the study, but let's say in here, we might be 1000 PPM. In here, we might be 2000 PPM. In here, we're like five or six. It was a huge, huge difference.
Zach Peterson: Wow, okay.
Chrys Shea: Yeah, I would have to go back and look at the numbers from the study, but it was a very remarkable difference. So our logic told us don't use the max, use the nom, try not to use them in.
Zach Peterson: So it really sounds like fabricators or not fabricators, but assemblers need to have some kind of strategies here for what they're gonna do when they start finding more boards that are using pads even below the minimum IPC standard size.
Chrys Shea: And you know what, I'm working on boards now that use even below the IPC minimum just because we have to get the density.
Zach Peterson: What's the plan? Is there a plan or is it just we're gonna do some experiments and see what happens?
Chrys Shea: It's called beat the tar out of the process engineer until they get the defects down. The whole point in my mind being a DFM disciple is to have the discussion upfront with the designers, so we know what to expect.
Zach Peterson: That's fair.
Chrys Shea: If we have to deal with minimum, we go to the line and we figure out how to deal with the minimum, or we start toying with our process parameters on this board so we don't waste production boards.
Zach Peterson: Well, I mean that's fair, but I think what a lot of designers will do is we always tell designers like, "Go talk to your manufacturer," but they probably only talk to the fabricator. And then when there is a problem or a defect in assembly, the fab and the assembly are pointing their fingers at each other and then the designer is pointing their fingers at both of them and it's like, well whose fault is it?
Chrys Shea: Exactly. And then with an assembly, we point fingers back and forth between the equipment and the materials as well.
Zach Peterson: Okay, that's fair. Yeah. And I think assembly probably gets the short end of the stick because they they probably don't get consulted as often as they should.
Chrys Shea: No, it's kind of like being at the end of the whip. Everything stacks up and multiplies and you get it all at the end.
Zach Peterson: So something that could have been a fab defect doesn't become noticeable until it creates an assembly defect and then everyone says, well, it's the assembler's fault.
Chrys Shea: Exactly, exactly, exactly. In fact, I've got a presentation that I used to give for SMTA meetings called Fab Hangovers and it's exactly that. As a process engineer on assembly line, you can spend a week chasing down a problem only to find out it was in the fab.
Zach Peterson: Really? How common is that?
Chrys Shea: More common than you would think. Some of the things we run into extremely often are over etch of pads. So we're trying to gasket our eight mil stencil aperture on what should be an eight or nine mil pad, but it's coming in at six because-
Zach Peterson: Okay. Okay, so you've-
Chrys Shea: The acid etch.
Zach Peterson:You've designed the process for, let's say, nominal, but it really comes in under nominal.
Chrys Shea: Yes. And a lot of that is just because of the trapezoidal effect of the acid etch.
Zach Peterson: Sure.
Chrys Shea: So we see that all the time. Another big problem we see all the time is solder mask misregistration.
Zach Peterson: Oh sure, yeah.
Chrys Shea: When the solder mask climbs up on the pad, it's very difficult to print and solder too, and we see it all the time. In fact, if you look at this test right here, what we've done is mixed mask and metal-defined pads because in assembly, we want them all mask-defined or all metal-defined. We don't want the mix, but that's not really been communicated to the designers. So we've taken this and mixed up some mask and metal. You can't see the mask layer. I'm only showing the copper layer right now. And then we skewed the solder mask. So this is off by one mil in X and Y. This is offset by two mil om X and Y. And this is offset by three mil in X and Y. In fact, let me actually turn the mask on, so you can see-
Zach Peterson: Yeah, I was just gonna say turn the mask on. So for those again listening on audio, we have some of those BGA footprints here. But then when you turn the mask on, you can actually see what would normally be that pad arrangement and then it's overlaid mask opening that you would typically see like an Altium designer. And then that mask opening is offset just a little bit by these amounts, one mil, two mil, and three mil.
Chrys Shea: Yeah. So that's the three, that's the worst case. This is the two. And we typically call out two to three mil registration on our specs, but we see it good registration coming out of high volume shops. We don't necessarily see good registration on the smaller volume shops. So that's why we decided to put this in there. And actually, a really, really good process engineer from ASMPT suggested this because I've been asking people for real life situations and we named it after him. His name is Jeff Shake and we're calling this shake up the BGAs.
Zach Peterson:This is the first time I've heard of a process named after a very well known person in the industry.
Chrys Shea: Well, we actually-
Chrys Shea: Hopefully soon we'll have the Hartley process.
Chrys Shea: There we go. There we go. Well, it turned out on the original board, we ended up nicknaming some of the sections like the 04 BGAs, we'd called it tic-tac toe and these type of things. So from the outset here, I decided to name the sections. For example, this here we call tombstone alley. This is another thing that's a DFM-related item that just does not get communicated to designers. These are capacitors and capacitors love to tombstone and it's because of thermal differentials across the device. So what we typically see is a metal-defined pad on one side of the cap and a mask-defined pad on the other. Let me see if I can bring the mask up there.
Zach Peterson: So just for everyone that's listening, what we have here are some big copper pour regions and then we have some some SMD components lined up around the edge of these copper pour regions. And I see here we have some of those SMDs have a thermal attach and some of them don't. And I guess this is kind of a side by side comparison of the number of defects you would expect to see.
Chrys Shea: Exactly. Again, that gives us the quality metrics to have the conversation with the designers and the owners of the product. Do you wanna risk the defects or can you put the thermal relief in?
Zach Peterson: Now, here's one thing I've been dying to ask somebody about just exactly what you're showing here with tombstone. If you go online and you start reading about DFA, you start reading about DFM, you start reading about assembly defects, it's almost obligatory that somebody says tombstoning. I mean, they talk about it as if it's like the most common thing and you need thermals everywhere. And no matter what you do, if you don't have a thermal, you're gonna see tombstone. How common is it, really? I feel like it's talked about as if it's more common than it actually is.
Chrys Shea: I think you're right because when we do tombstoning tests, to get good sample sizes, we literally do hundreds of thousands of joints. Again, tombstoning is to a large part to this type of scenario where you've got an unequal thermal, and they will exactly tombstone or so we're hoping. Another thing that we've also been finding lately is if you control the tombstone, you can end up with a nice solder joint on your metal-defined side and a cold joint on your mask-defined side.
Zach Peterson: I see.
Chrys Shea: So even though it's not a tombstone, it's still requiring rework. Every time we rework a board, we reduce its reliability.
Zach Peterson: Right. That makes sense.
Chrys Shea: We try to avoid that at all costs. We built these tombstone alleys for our 0201 caps, our 0105 caps and our 0804 caps. Caps are a lot more likely to tombstone than resistors because they have five-sided terminations and mechanism by which tombstone occurs is the melted solder wets to one end and the surface tension just pulls it right up. So whichever side melts first is the base of the tombstone. Resistors don't tombstone as much because they only have three sides of metalization. So there's not enough metalization for... Not as much, let me say, metalization for the solder paste to grab. But now we've got this new phenomena that we just designed in down here, and we set it up similar to the tombstone alley. I've talked to three different assemblers in the last month who are dealing with bottom terminated Zener diodes. These are 0201 or 0105 packages, and they have very small bottom terminations and they're very light. So what happens is, again, the side that melts first, the solder pulls it. It doesn't pull it up because it bottom terminated, it pulls it laterally, and you will see all of these skew by the same degree in the same direction when they have the uneven thermals.
Zach Peterson: Interesting that they would all do the same thing.
Chrys Shea: Yes, yes. And we've done things where we'll switch orientation in the machine, or we'll switch orientation in the reflow oven, or we'll run it at 90 instead of zero and they all still skew in the same direction. So I'm convinced it's due to thermal differentials and that's why I put these on this revision of the board.
Zach Peterson: We only have a few minutes left, but one last question I wanted to ask you. What are some of the other tests that are gonna be performed that might be exclusive to like a UHDI test vehicle?
Chrys Shea: We are planning on putting in a really just interesting, nice little window here where we have decreasing trace sizes and a mask window so you can actually see. Now, also this board to keep it economical in two layer for assemblers, we're running five mil traces.
Zach Peterson: Sure. As you know with Altium, we can instantly go in there and turn them all to one mil traces.
Zach Peterson: Oh yeah, yeah.
Chrys Shea: Or two mil traces or three mill traces. I shouldn't say it's just a couple clicks of the mouse because I don't wanna insult the beauty and sophistication of this tool, but it actually illustrates the beauty and sophistication of the tool that you can go in and say change my traces to one mil, two mils and see how fabrication goes. I'm actually looking forward to making this board with the additive process so that we can have those nice flat pads. If we were to look at the bottom side of the board, we've got these things called print to fail. So on the bottom side of the board, we've got these things called print to fail. And they're different sizes, shapes, and they're mask and metal-defined. And we always see the trapezoid very, very clearly when we look at the metal-defined ones here. And I've shown pictures of them. I don't have the presentation handy right now. But when we do half of these in additive and half of these in subtractive, we're gonna be able to look at that. Geez, even under a 10x ring light and see the difference. As an assembly engineer, I'm really looking forward to flat pads that are right size. I can't tell you how much I'm looking forward to that.
Zach Peterson: As you've mentioned, that is extremely important, especially when you start going to sub IPC standard levels. So I'm anxious to see it too.
Chrys Shea: Exactly.
Zach Peterson: I'm sure as all this stuff develops and you start proving this out, it would be great to have you back on and we can discuss this more.
Chrys Shea: I'd love to come back on. I'd love to come back on with the actual Ultra HDI where instead of routing on the top layer, we're routing in layers 2, 3, 6, 7.
Zach Peterson: 22.
Chrys Shea: Yes.
Zach Peterson: 27.
Chrys Shea: Yes, indeed. Let's punch all the way through to the back and then back up top through 10 layers, 20 layers. The bigger the challenge, the more fun it is.
Zach Peterson: That's awesome.
Zach Peterson: And I think most engineers will tell you the same thing.
Zach Peterson: I have the same attitude. Chrys, thank you so much for being here today. This has been super informative. And I encourage anyone that's listening on audio, head over to YouTube and watch the video. You'll be able to see everything that we've been talking about. It's a really great learning experience.
Chrys Shea: Thank you so much for having me.
Zach Peterson: Absolutely, anytime. For everyone that's out there listening and watching, we've been talking with Chrys Shea, president of Shea Engineering. Make sure to check out the show notes. You'll see some great resources there where you can learn more about all the topics we've been talking about. Also, if you're watching on YouTube, make sure to hit the Subscribe button, hit the Like button and you'll be able to keep up with all of our tutorials and podcast episodes as they come out. Last but not least, don't stop learning, stay on track, and we'll see you next time. Thanks, everyone.