Design Custom NanoBoard Peripheral Boards

Part 1: Creating your own peripheral board template

In this first installment of this two-part tech-tip, we’ll look at how to go about getting the PCB design under way, starting with the PB30 reference design and modifying it to form a template for your custom peripheral board. Along with that, we’ll discuss some of the IO connections available for custom peripherals.

In the next installment we’ll discuss the registration process and how to get started on your FPGA designs using the new peripheral board you’ve created.

The NB2 and NB3000 are used by many engineering schools, individuals and corporate design teams to explore and bring to life new design ideas.

The NB3000 has been particularly popular, not only because of its welcoming price tag, but also thanks to its extensive set of IO devices and options. These include USB (Host and Slave), RGB LEDs, TFT touch screen, isolated relay switches, ADCs, DACs, RS-485, RS-232, Ethernet, MIDI, SVGA, and high-definition audio IO - to name just a few!.

Both NanoBoards are extensible development boards, having peripheral daughter-board locations for adding extra IO capability. At the time of writing this tech-tip, four peripheral boards are available from Altium: the full-sized PB01 (audio codec, analogue video IO), the PB02 (mass storage board with SD, CF, ATA, etc.), the PB03 (Ethernet, USB, IrDA), and the PB30 - a full-sized board with the necessary connector to the NB2/NB3000 and several different prototyping areas for building simple add-on circuits.

While the prototyping board is a great starting point for trying out simple circuits with a connection to the NanoBoard NB3000, designing your own peripheral board gives you limitless possibilities.

In this first installment of this two-part tech-tip, we’ll look at how to go about getting the PCB design underway, starting with the PB30 reference design and modifying it to form a template for your custom peripheral board. Along with that, we’ll discuss some of the IO connections available for custom peripherals. In the next installment we’ll discuss the registration process and how to get started on your FPGA designs using the new peripheral board you’ve created.

Preparing the peripheral board files

The first step is to build the template for the peripheral board, and in this tech-tip we’ll base it on the PB30, because this board is oriented such that the Altium Nanoconnector is at the top left, and the silkscreen is generally showing right-way-up when it’s plugged into the NanoBoard NB3000. If you are using the NanoBoard NB2, the full-sized peripheral board space is located at the top, in which case the PB-01 (Audio, Video) board would be a good choice, since its orientation is 180 degrees rotated.

The current release of Altium has the default location of the PB30 reference design at “C:\Program Files\Altium Summer 09\Examples\Reference Designs\PB30\”. .

Copy the entire folder for the peripheral board, and rename it for your template. In this case we’ve called it PBUSER:

Also, you should rename the actual files in the project. A quick way to do this is using the good-ol’ DOS command RENAME with some wildcards:

Now if you open the PBUSER.PrjPCB Project in Altium , you will get a warning for each document that was previously a member of the project that it is no longer found, and will be removed.

This is because we renamed each of those files (appropriately). That’s okay, because all we need to do is re-add them to the project again using the command Project» Add Existing to Project..., selecting all the PBUSER*.* files and click OK.

Now, we have a complete duplicate of the PB30, the only difference being that the project and all it’s files have been renamed.

The next step is to remove the prototyping area from the design. That’s relatively easy because it is actually a component we can remove from the schematic designated PROTO1. The PB30 reference design also contains a schematic component which is a reference to the fabricated PCB. This allows a complete assembly to be generated where the PCB itself is one of the components needed to assemble the product. However, in the template we are creating it’s no longer relevant, so we’ll delete that as well.

The PB30 design also contains the 1-wire PROM used for ID and registration of the board with Altium that enables the constraints for the FPGA design to be auto-configured - we’ll leave that one in the design since we want that capability for our custom PB. Once we’ve deleted the superfluous from the schematic, clicking on Design» Update PCB Document PBUSER.PcbDoc will launch the ECO process to push the changes to the PCB and, ultimately, remove those unwanted . In executing this command, you may get a warning that some components could not be matched using unique IDs. In that case, click Yes to allow the synchronization to continue. Likewise, if you’re prompted to match component classes, click No. (These issues will also simply be resolved by running the ECO process.)

You can see when you look at the ECO before executing it that it will remove all the unnecessary component pads from the netlist, the PROTO1 component footprint (which is the entire prototyping area), as well as the redundant component class and room. A new component class and a new room, both named from the new design files, will be added. Executing the ECO finishes this process, and opens the updated PCB design.

You can see here that the original trackwork from the prototyping area remains, teardrops included. We can remove the trackwork by using Tools» Un-Route» All. To remove the teardrops, we need to box-select them and simply hit Delete.

As part of the ECO process, a new Room was added to the board, named after the top-level schematic (in this case PBUSER Double_Sized_Proto_Board). If you do not wish to use rooms, you can just select and delete it. Otherwise, select it and drag its top-right corner so that its area covers the board.

You may notice that there are two PCB documents in this project - PBUSER.PcbDoc which is this PCB, and PBUSERPanel.PcbDoc. PBUSERPanel.PcbDoc is a two-by -two panelized version of the main PCB design, using an Embedded Board Array. As it refers to the main PCB, there is very little modification necessary to be done. The Embedded Array itself needs to be updated to point to the new PCB document. This is done by double-clicking on the array (which looks like a small grey rectangle) and specifying the new PCB file name:

When the array points to the new blank board you can see them properly within the panel:

At this point, any text strings that refer to “PB30” should also be changed to reflect this new board’s name. You could even opt to use special strings as a replacement so that they can be automatically updated from a project parameter - especially useful if this is used as a template for many new designs.

Also, the barcode on the Top Overlay layer is simply a string with barcode font. For Altium boards, it is simply the name of the board. In this case it should be updated to PBUSER, but you can make it match whatever your peripheral board part name will be.

Creating the template

Once the updated files and project have all been saved, they are ready to be used as a basis for any new custom peripheral board design. They can also be used together as a project template, by copying the project and its files into the Templates folder of the Altium installation. Then, from the Files panel in Altium, click PCB Projects, and in the New From Template pane click PCB Projects... and browse for the PBUSER.PrjPcb project in the Templates folder. When you save the newly created project, you’ll be prompted to choose a new location to save the project and all the source documents from the template.

Pin swapping and the NanoConnector

One of the major benefits of using this template is that the schematic component representing the Nanoconnector used to interface to the NB3000 or NB2 host is preconfigured with all the appropriate pin assignments for the host’s fixed-function IOs, such as Audio, SPI, I2C, and the host clock. In addition, the system hard and soft JTAG chains are routed to the peripheral board’s Nanoconnector along with an enable line, making it a cinch to add extra FPGAs, microcontrollers or boundary-scan devices to the system. Of course, the ’s power supply rails are also provided. Voltages available are 1.2V, 1.8V, 2.5V, 3.3V, and 5V.

In addition to the fixed-function IOs, one side of the Nanoconnector is dedicated to general-purpose digital IOs, which ultimately connect through to the user FPGA on the NB3000 (or NB2). These pins on the Nanoconnector component in the design (designated HDR1) are all preconfigured to be swappable. This is especially handy as the routing around the connector can be quite dense because of its fine pitch. There’s no magic trick to using this capability - in the example shown below the pin-swapper was executed from Tools» Pin/Part Swapping» Automatic Net/Pin Optimizer, and the resulting changes were fed back to the schematic through the reverse-ECO process using Design» Update Schematics In <project>.

You may find it’s useful to execute the pin swapper several times throughout the process of routing the board, as your trackwork gets nearer to completion points. This helps remove cross-overs and greatly speeds up the process of creating your custom peripheral. The example above was completed in only a couple of days, and a 3D view is shown below:

One final and very important point about the Nanoconnector is that it is available from Altium anywhere in the world at low cost (and with volume discounts). The order number for this connector on the peripheral board is 99-400-NBC (a tube of nine connectors is provided).

...and coming next month!

Well, that concludes the first part of this tech-tip. And once you have gone through this process and created your template, and of course personalized it with your own company logos, etc. , it is a simple matter to create as many custom peripheral boards as you like.

In the next part of this Tech Tip, you’ll discover the “soft” aspects of using your new custom board with a - how to create a re-usable constraint file, give the card a personality with the 1-wire PROM, and create a matching port-plug-in to use with your FPGA projects.