Designing a 4 Layer Stackup With 50 Ohm Impedance PCB Traces

Zachariah Peterson
|  Created: July 12, 2021
4-layer stackup 50 Ohms

Read any guide on PCB design, and you’ll see mentions of 50 Ohm impedance, track widths required to reach said impedance, and how it all relates to the stackup. You’ve probably also seen some calculators online that can be used to determine the trace width needed to reach a 50 Ohm impedance. The reality is that none of these calculators or guidelines are very useful if you don’t have a manufacturable PCB stackup. A 4-layer stackup is a good starting point for most designs today, including designs that need 50 Ohm impedance.

This need to ensure manufacturability will determine the limits on your trace width needed to design a 4-layer PCB stackup with 50 Ohm impedance. Keep reading to see how manufacturability will affect your choice of trace width required to reach 50 Ohm impedance in your 4-layer stackup.

What is the Standard 4-Layer PCB Stackup?

Suppose you know your design will need to have 50 Ohm impedance on a 4-layer PCB stackup while also having a standard thickness of 1.57 mm (62 mil). In that case, you’ll be limited in your available layer stack arrangements and material options. Manufacturers will keep certain materials available for their customers. Otherwise, they will be outsourcing fabrication, or they may need to do a special order specifically for your board, which will increase your costs. This is one reason veteran PCB designers will tell you to contact your fabricator early to make sure your stackup is manufacturable.

How to Get to 50 Ohms

Getting to 50 Ohms means you need to pick the right trace width for your particular stackup. For example, there are a few factors that will limit your available trace width to get to 50 Ohms in a 4-layer stackup:

  • Available materials: Remember that FR4 laminates do not have a specific dielectric constant (Dk) value, and this value is a big determinant of your trace impedance. FR4 laminates can have Dk ranging from about 4.0 up to 4.8 depending on the stackup material.
  • Laminate thickness: The FR4 laminates used in PCB stackups will also have specific thicknesses; you can’t just mix and match any laminates you want. You can request a specific thickness for the inner and outer layers, and the manufacturer will do their best to build the stackup to the standard thickness.

If you want a specific trace width and material, your only other option to get to 50 Ohm impedance is to use a non-standard thickness. For example, Mini PCIe cards are 1 mm thick rather than the standard 1.57 mm. Therefore, depending on the core, outer layer prepreg, and total thickness requirement, the PCB trace width will be different.

Standard 4-Layer Stackup

The image below shows a typical 4-layer PCB stackup construction you’ll receive from most fabricators. It consists of a thick core (about 42 mils) and 2 prepreg layers (7 mils each). The standard 4-layer stackup uses two inner layers for power and ground, and the two outer layers are for components and trace routing. The inner layers being set as ground will determine the impedance for traces on the surface layer.

4 layer PCB stackup 50 Ohm
Typical 4-layer PCB stackup.

Here, trace impedance will be determined by the Dk value, which is 4.1 for this particular prepreg. Note that other prepregs will have a different value for Dk, and that value will also depend on the relevant frequency for your design. This bit about frequency is a more advanced discussion, so we’ll leave that for another time.

For now, let’s just assume you know you need to get to 50 Ohm impedance in the stackup shown above. Then, using a standard PCB trace impedance calculator or using the formulas in a textbook, you’ll find that the required trace width is 13 mils. So just set the trace width constraint in your PCB router to 13 mils, and your routes will all be precisely 50 Ohms.

There are a few points to note about this. First, the impedance will be modified if you bring some copper pour too close to the 50 Ohm traces on the top or bottom layers. Note that you’ll want to keep any copper pour on the surface layers somewhat separated from your traces by a distance about double the trace width (or 26 mils separation in this case). Second, the copper foil thickness (or copper weight) may differ, although the thickness is also standardized to either 0.5 oz/sq. ft. or 1.0 oz/sq. ft.

Copper pour clearance near microstrips
This 26 mil clearance between copper pour and the 13 mil trace is sufficient to ensure 50 Ohm impedance.

The bottom line is: check with your fabricator when planning a 4-layer PCB stackup with 50 Ohm impedance. They can give you some stackup options, and they can tell you the trace width you will need to reach 50 Ohms for their stackup materials.

When to Use 50 Ohm Impedance

One question hasn’t been posted just yet: do you even need 50 Ohm impedance? The answer is “it depends.” This is an important part of signal integrity that newer designers sometimes overlook. Most digital protocols use 50 Ohms single-ended impedance, but only when the trace is long enough. A few different guidelines state when your trace is so long that 50 Ohm impedance is required.

You often see PCB routing guidelines state that traces should be as short as possible to avoid the need for setting the impedance to 50 Ohms. This way, you can use a thinner trace and not worry about the signal integrity problems associated with long traces. This issue of defining an appropriate limit for a “long” trace is a complex problem, and you’ll see several answers in many guides on the internet. For now, I’ll save this for another blog as it is a complex topic that involves some math. However, to be safe, there’s no harm in just setting all your traces to the required width for 50 Ohm impedance using the best PCB layout and routing software.

Read Two Alternative 4 Layer PCB Stackups With 50 Ohms Impedance

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About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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