When working with analog signals, you need to ensure your device is operating linearly in order to prevent problems like harmonic distortion during operation. Nonlinear interactions in analog devices lead to distortion that corrupts a clean analog signal. It may not be obvious when an analog circuit clips just from looking at your schematic or datasheets. Instead of tracing through your signal chain manually, you can use simulation tools to get insight into the behavior of your device. Some important simulations with sinusoidal signals, such as a frequency modulation simulation, can be easily performed with the pre-layout simulation features in Altium Designer®.
In this post, I’ll continue from a previous simulation and bring an FM source into a circuit with a transistor. Here, the idea is to see what range of input values I can use with my analog source in order to ensure that the device operates in the linear range, i.e., when my nonlinear circuit stops behaving linearly.
This is quite important in amplifier design and when designing transistor-based analog integrated circuits. With regards to general nonlinear circuit and amplifier design, we need to know things like:
The other important point with this system, in addition to nonlinearity in your circuits, is rectification and DC biasing. In common collector/emitter amplifier circuits, you'll often need some DC bias on a time-varying signal in order to fully modulate the current in the transistor, and it's useful to find the minimum DC bias needed to ensure a clean waveform is passed to the load. We'll investigate this and show how to set up these simulations generally in this article.
In a previous post, we looked at load line analysis for a circuit with an NPN transistor. Based on the DC sweep results, we can see when the collector current starts to saturate as the collector-emitter voltage is ramped to higher levels. This allowed us to extract the load line for this circuit, and to see how the threshold voltage changes.
In this simulation, I’ll show you how to bring a sinusoidal FM source into your simulations and examine when clipping occurs. In this frequency modulation simulation, we can then examine the Fourier components and determine when new harmonics are generated. We can then modify the simulation by changing the DC bias to see how the FM signal clips and identify the range of input values that lead to linear behavior throughout the relevant frequency bands. This is an important aspect of RF signal chain design.
I’ve reused the simulation schematic from my previous post, with the exception that I’ve replaced the DC source seen by the base with a frequency modulated source. You can access this simulation source (named VSFFM) from the Simulation Generic Components.IntLib library in the Components panel. In this schematic, I've added a resistor from V_CC to the transistor base in order to apply some DC offset to V_FM. With this schematic, we can adjust the value of R_B to see when we've applied enough DV offset to V_FM to ensure we pass a clean FM signal to R_LOAD.
In this schematic, the basic idea is to use the FM wave to modulate the current in the transistor. Here, I've used a common collector configuration with R_E as a current-limiting resistor. However, you could also use a common collector configuration (V_FM at the base) and measure the output across R_E. Our goal is to determine the base current supplied by V_CC that will put the modulated load current into the linear range. Note that this additional current basically moves you up the load line and into the active region as long as V_CC is large enough. However, if V_FM gets too large, you might end up back in the saturation region. With V_CC operating at logic levels, we can reasonably expect that that this will give a clean FM wave at the load as long as we apply enough DC offset.
Here, I’ve set the carrier frequency to 100 MHz, the modulation index to 5, and the baseband frequency to 10 MHz. The AC range has initially been set +/- 1 V with no DC offset. In this circuit, you can use your load line results to see the appropriate range of AC values that should be applied to the base for a give collector-emitter voltage. If you look at the load line results, you’ll be able to find the range of collector-emitter voltage values that produce a linear output; we would like to quantify whether this input range is appropriate for this circuit. The Properties dialog for the generic simulation source in Altium Designer nicely shows these parameters and a waveform.
Here we want to run a transient analysis as this will show the behavior of the system in the time domain. The setup for the transient analysis can be seen in the Simulation Dashboard. I’ll be measuring the collector current, collector-emitter voltage, and the power seen by the load resistor (R_LOAD). Simply go to the “Simulate” menu and click Edit Simulation Setup to locate the parameter sweep and transient analysis settings. In the transient analysis setup (shown below), I’ve set “Default Cycles Displayed” to 10. This was set because the ratio of the carrier frequency to the signal frequency is 10, so an entire modulation cycle will be seen in the output. If you set this number lower, you will not be able to see results for a whole modulation cycle.
Since we want to make sure we're passing a clean signal to R_LOAD, we need to adjust the value of R_B so that we have enough DC offset to produce a clean signal as measured across R_LOAD. To do this, click the Settings option in the Simulation Dashboard. This will bring up the Advanced Analysis Options window. The main point I want to focus on here is the sweep options. I've applied decade settings as we'd like to ensure we can quickly scan over a large range of values for R_B. Once you get to a ballpark value for R_B, you can narrow down the range to fine-tune the value of R_B to give you the best results.
To get the results, click Run on the Simulation Dashboard, or press F9 on your keyboard. As long as you’ve defined models for all of your components in your schematic and there are no errors in the generated netlist, you’ll see a set of graphs appear on the screen. In the image below, I've shown a set of voltage and current curves for the values of R_B used in the parameter sweep.
The results are interesting. If we want to deliver maximum power to the load, we should set R_B to above 100 Ohms but less than about 316 Ohms. This is because we see some clipping at 316 Ohms, so we should set the value of R_B lower to ensure we keep the same high AC and DC power while eliminating clipping. You can verify this by calculating the product for each pair of waves in the above graphs. Note that, if we were to change the DC value of V_CC, we'd have a different required value for R_B in order to produce the clean modulation we want at R_LOAD.
The alternative form of the schematic shown above places V_FM at the location of V_CC. In other words, the base voltage would simply be a switch that allows an FM signal to pass through the transistor. If we make this switch, we'll be able to see why this is only useful when you also apply base voltage and high DC offset to the FM signal. This type of circuit wouldn't normally be used as an amplifier for a receiver. Instead, this can be used with the base voltage acting like a switch, which then allows a high power pulse to be delivered to a load component.
Based on the previous results, I've set the AC range to +/- 0.25 V with some fixed DC offset. In the parameter sweep window, I’ve set the primary sweep parameter to the base voltage. I’ve chosen to vary the base voltage from 1 to 7 V in increments of 2 V so that you can see how this will affect the output. This will allow me to see the load current and power clips and to know when we can see a clean pulse. My simulation produces a set of six plots, but I want to focus on the three shown in the image below.
The top graph shows the collector current at a base voltage of 7 V. The middle set of waveforms shows the collector current as the base voltage is swept from 1 to 7 V. It should be obvious that the collector current clips heavily at low base voltage values. This is also seen in the bottom waveform, which shows the power at the load resistor. Note that, if you set the bias point in your FM source to 0 V, you will have severe clipping as you will be attempting to drive the transistor in reverse, thus the DC bias point is required when working with this transistor.
To create a fast Fourier transform (FFT) chart, simply select a waveform in the transient analysis results, go to the Chart menu, and click on Create FFT Chart. The Fourier spectra below show the frequency components in the load current (top graph) and power in the resistor (bottom graph). These graphs were plotted from the parameter sweep results, although you could also create plots with the base voltage set to specific values (you can set this in the schematic directly). We can see higher order frequency content in the spectra (up to 7th order), although there is some harmonic distortion due to the clipping in the transient analysis results.
If you like, you can add a wave to these charts in a new graph for the FM source, and perform an FFT for this source. From our results, we see that using a base voltage of 7 V is nearly ideal for the signal we are working with, where the FM source has a DC bias of 0.25 V and amplitude of 0.25 V about this bias point. To clean up the signal, the amplitude of the FM signal should be decreased, or the base voltage should be increased.
You could also export the simulation/FFT data to an Excel file, which will allow you to calculate the level of distortion seen at the load. Since we are dealing with sweep results, you could apply these harmonic distortion calculations for all the FFT spectra shown above, giving you a curve showing harmonic distortion as a function of base voltage.
The unified environment in Altium Designer allows you to take your schematic data and perform a frequency modulation simulation or any other analysis you like. This is much better than working in a separate program to run these important analyses. Altium Designer also gives you access to a complete set of post-layout simulation tools for signal integrity analysis.
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