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    How to Design With a DP83848C Ethernet PHY

    Altium Designer
    |  January 28, 2019

    Online gaming with Local Area Network (LAN).

    In my university days, high-speed internet was non-existent. Online gaming was often limited to Starcraft or Warcraft, played over the Local Area Network (LAN). Friends would gather and start battling each other from different computers within a house, with cries of victories reverberating through the walls.

    It’s possible to be an awful Warcraft player and still design great PCBs. However, if you fail to understand the LAN and its underlying interface, you’ll do a poor job designing with a DP83848C Ethernet PHY. The results often involve unstable connections between the microcontroller and the ethernet.


    About the DP83848C

    Despite the hype about wireless communications like Bluetooth, WiFi or other peer-to-peer protocols taking over the IoT, wired-based networks are still an essential feature in certain industries. For an embedded system, the physical layer of the network is key to ensuring a stable foundation for upper layer protocols.

    The DP83848C is a popular ethernet physical layer transceiver that is the gateway between the microcontroller and the external LAN network. It is driven by a 3.3V supply and takes the form of either a 48 pins QFP or a 40 pins QFN package. It supports Media Independent Interface (MII), Reduced Media Independent Interface (RMII) and Standard Network Interface (SNI), thus supporting communications with a broad range of microcontrollers.


    Designing With the DP83848C

    I first came across the DP83848C when I was tasked with improvising a door access controller with LAN-capable communication. Back then, door access controllers relied on the RS485 and faced limitations in speed and connection stability. As I pushed through my first working prototypes, I noticed a few factors that hardware engineers should pay attention to while developing a functional ethernet interface:

    1. Magnetics

    RJ45 connector

    Choose RJ45 connector with built-in magnetics.

    To connect to an external LAN network, the design requires an RJ45 connector with built-in magnetics. The magnetics are miniature signal transformers used to provide proper isolation and signal conditioning. The center-tapped part of the transformer is pulled high to the Vcc while capacitors are placed close by. Signals that pass through the RJ45 connector and magnetics are pretty high-speed; therefore, no other signals should be routed beneath or close to the Ethernet signals.

    2. Prototyping

    The DP83848C is a high-speed component, with the ability to operate at up to 100 Mbps. It is also an extremely sensitive component that needs to be assembled carefully. While machine assembly isn’t typically problematic, manual assembly can sometimes produce unstable results if the soldering isn’t performed perfectly or solder paste between the pins isn’t cleaned up.

    3. MAC Interface

    PCB best practices for data integrity

    Follow PCB best practices to ensure data integrity.

    The bottleneck in processing or transmitting data packets in an embedded system is often the microcontroller and the reliability of the interface with the DP83848C. The MII is a commonly used protocol between a microcontroller and the DP83848C. To operate at 100Mbps, the MII clocks runs at 25MHz.

    The MII has a separate data bus for both transmitting and receiving. Each of the buses consists of a clock and four data bits signals. To prevent signal glitches that may affect data integrity, the clock and data signals should be routed in parallel with the same length.

    Other high-frequency signals should also be placed further away to prevent crosstalk. It is also advisable to place the DP83848C as close as possible to the microcontroller.

    4. Testing

    Anything that relates to communication is relatively harder to test. Data transmission and reception need to be proven stable. Conducting full-scale testing on the DP83848C involves writing a complete application stack to ping the router. Having to do this simply to ensure the design’s functionality is not efficient.

    Instead, firmware developers can take advantage of the Built-In Self-Test feature of the DP83848C. With this tool, developers can quickly ensure that the hardware is functional by enabling loopback testing and sending data packets off the Ethernet transceiver.

    Stability and data integrity are crucial when designing with a DP83848C. Using the multiple pair routing tool in Altium Designer® simplifies the process of working with the MII interface. You can download a free trial to see if Altium is a good fit for your design needs.

    Need more tips on working with the DP83848C? Talk to an expert at Altium.

    About Author

    About Author

    PCB Design Tools for Electronics Design and DFM. Information for EDA Leaders.

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