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    High-Speed PCB Design Analysis: Simulations and Signal Integrity Checks

    Altium Designer
    |  June 22, 2018

    High-speed electrical signal with and without overshoot and ringing

    When end of summer rolls around, I gather my family and head over to the State fair for magical excitement. During the year, the fairgrounds are deserted, small dust whorls blowing across the barren landscape. But when the fair is on, the fairgrounds are bustling with activity. There are booths with elephant ears, buildings with animals and demonstrations, and there are amusement rides with screaming kids. It is quite the juggling act with all its moving parts.

    Putting together a Printed Circuit Board with high-speed signals comprises a juggling act of design, components, and high-speed signals. These high-speed signals create opportunity for an unnecessary transmission line to create havoc with your circuit board. Much of the mayhem occurs within the PCB layout itself.

    Knowing what of the layout contribute to this ravage allows resolution while laying out the board. Knowing if the layout techniques you’ve applied are best practice for signal integrity analysis in PCB design. It can be discovered either by performing lengthy pencil analysis or by using signal integrity simulation tools. After reading this, I’ll let you decide on which you think will be more effective for your boards. However, I think you'll come to the conclusion that simulation and signal integrity checks are worth taking a look into. In fact, taking the time to do a signal integrity analysis may be more beneficial than you originally thought. 

    Inadequate Signal Integrity Simulation Tools

    With inadequate signal integrity simulation tools, the magic turns to chaos. The impedance calculator returns incorrect impedance calculations. The calculations contradict the layer stackup and the dielectric constant of the defined material within the PCB design rules. The simulator assumes a return path for modeling so if you have discontinuities in the ground plane, they are not included in the calculation. The 3D field solver returns calculated impedance for differential pairs that are very wrong.

    The tool is simple and doesn’t support customary options for PCB layout keeping in mind the design rules. This includes rules and simulations for rigid flex. Its simulation environment produces waveforms that are difficult to understand. Delving further requires intricate manual commands to evaluate ordinary operations. This is true for its 3D field solver as well. With a user interface that doesn’t have selections to analyzing for electrically long traces, there is no confidence when laying out the circuit board for high-speed signal integrity.

    Circuit design includes signal integrity analysis

    Use brain power elegantly with intelligent EDA tools

    Time Sink to Interpret Results

    Hours are spent sorting through the simulation tool results to analyze glaring errors. Moving through the menus requires meticulous work. Time is sunk walking through the impedance calculator revealing that incorrect parameters were used to calculate trace impedance. Time is spent discovering that the parameters used by the simulator do not match up with the net rules set for PCB layout. Who would have guessed?

    Without the correct parameters for intrinsic capacitance and dielectric constant of the planar material, there is no confidence that the calculated impedance will indeed reduce reflections and ringing for high-speed signals.

    Obscure environment anomalies such as a missing drill file cause the simulator to fail. Given the multitude of PCB editors and settings required to set up the simulation, having a missing drill file throw a fault confuses the setup process. It leads to questioning and re-questioning chosen parameters given to the editors and settings menus.

    Rifling through help pages and application notes lead to more hours wasted while analyzing tools that simulate high-speed signals for signal integrity. Finally, getting to the waveform illustrating results of the simulation frequently displays garbage. It is frustrating to have powerful tools at my fingertips without elegant user interfaces to drive them properly toward my circuit boards. At the end of the day, integrity is still up for grabs.

    Competent Tools That Identify and Resolve Integrity

    Wouldn’t it be great if the impedance calculator within the tool used the material parameters set up in the PCB design rules? Having a tool port information stored in its overall design rules to compute impedance drives confidence that the printed circuit board will return from the manufacturer with the correct components and layout to complement the circuit design.

    Having a simulator use parameters from the PCB design rules drives confidence in the results. Getting waveforms displayed showing results of the simulation during both schematic capture and PCB layout would help evolve the design constructively, on the days when engineers and layout designers are addressing signal integrity issues and resolutions. It removes the guesswork of conducting the analysis and applying best practice from your pencil musings, waiting for PCB manufacture before validating the integrity through a signal integrity analysis.

    Altium Designer® Incorporates Accurate Waveform Analysis

    Altium Designer has an Impedance Formula Editor within the PCB Layer Stack Manager. The Layer Stack Manager is easily accessed within the PCB layout environment from the pulldown menu. The Impedance Formula Editor contains correct routing impedance formulas for all topologies, microstrip to stripline including embedded, dual, and differential nets. The default formula is easily accessible within the editor for each topology. This allows direct access to each topology’s formula for easy modification within the tool. As an alternative, if it is more convenient, the impedance formula may also be accessed and edited via the Query Helper.

    Impedance Formula Editor within Altium Designer’s Layer Stack Manager

    Impedance Formula Editor easily accessed via the Layer Stack Manager

    Once impedances for reflection and ringing have been baked into the PCB layout, the signal integrity simulator may be set up to analyze high-speed signal behavior. The simulator accepts signal stimulus defined by the designer. The PCB designer also includes parametric characteristics of the high-speed signal nets such as overshoot and undershoot values, flight times, and supply net limits.

    The simulator uses these values to display results in the Waveform Analysis window. The resultant waveform shows signal integrity issues such as ringing, reflection, crosstalk, or voltage droop induced on the high-speed lines by characteristics of either the PCB layout or filtering discretes. The PCB designer is able to adjust impedances to maximum signal integrity and continue to perform waveform analysis until the design is free of noise.

    Altium Designer is a powerful and easy-to-use Schematic Capture and PCB layout tool that allows impedance setting for high-speed traces while you work. Using the PCB editor, its unified environment makes it easy to use, getting you to the results you need for signal integrity within your designs before the Printed Circuit Boards go to manufacture.

    If you are looking for an EDA tool that includes easily used tools for designing your PCB layout for maximum signal integrity, talk to an expert at Altium Designer.

    Start the journey to switch over to Altium Designer today.

    About Author

    About Author

    PCB Design Tools for Electronics Design and DFM. Information for EDA Leaders.

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