Introduction To PDN Analyzer Webinar Recap July 17, 2018

Alexsander Tamari
|  Created: July 18, 2018  |  Updated: November 27, 2020

If you joined us for the July 17th, 2018, PDN Analyzer webinar then the following will be a recap, if not here’s what you missed. You can also view the presentation slides and recording here.

Key Takeaways

Power Delivery Network () Design Issues

  • Low supply voltage at load components

A low supply voltage at your loads can cause issues like processors outputting faulty logic. These things happen when there is an unexpected voltage drop.

  • Delamination and via separation

If your current is too high it creates too much heat in the copper delaminating the board and/or separating vias. With via(s) destroyed so is the functionality of the board.

  • Copper plane resonance ​

Copper island and peninsulas can be a cause for concern as they can resonate with with other signals on and even outside of your board. Troubleshooting these is very difficult, its best to find and fix these issues before they occur.

Why You Need

  • Solve above issues
  • Increase productivity with an efficient and realistic workflow
  • Work in your current design environment


Q: What kind of data must be associated with each component and where and how is that data added?

A: No extra data needs to be added to your components. CST has simulation models for each component type.

Q: Is there any plan to add temperature estimation?

A: This is something we know that people want and we are currently looking into how to best implement this.

Q: Is capable of simulating MOSFET switching?

A: Yes. You can simulate your design in batches with one batch at a high and the other batch as a low.

Q: Are there any plans to implement AC analysis?

A: Yes, we plan to continue improve which includes adding AC analysis.

Q: Does analyze the inner layers for power delivery?

A: Yes. looks at all layers and vias

Q: Can loads in multi-channel instances be added in batch?

A: Yes. But remember when you load different network configurations in batch mode each configuration will be simulated individually from each other.

Q: Does it handle blind vias?

A: Yes, can handle blind, buried and standard vias.

Q: Does PDNA simulate with multiboard?

A: Currently it does not, you would need to analyze each board individually.

Q: Does PDN have a voltage limit?

A: No, does not have a voltage limit but your board might.


Want to try it for yourself? Try the PDN free trial today.

About Author

About Author

Alexsander joined Altium as a Technical Marketing Engineer and brings years of engineering expertise to the team. His passion for electronics design combined with his practical business experience provides a unique perspective to the marketing team at Altium. Alexsander graduated from one of the top 20 universities in the world at UCSD where he earned a Bachelor’s degree in Electrical Engineering.

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