As noted in part one of this article, there are a variety of aspects regarding manufacturability and reliability that come into play as part of the pad stack design process. When it comes to soldering through-hole components into the plated through-holes in a PCB when the pin connects to a plane, you have to thermally isolate those holes from the planes to ensure successful soldering of those components. This is accomplished via a feature called a thermal tie. This article describes thermal ties, their physical characteristics and how they are successfully implemented in a given design.
When a component lead is soldered into a plated through-hole to make a connection to a plane, either power or ground, the heat needed to melt the solder is drawn away from the hole by the copper planes in the PCB. This results in a poorly made solder joint and a component lead that is very difficult, if not impossible, to remove.
This creates a dilemma. How does one electrically connect a component to a plane while at the same time thermally isolating it? The answer is through the use of a thermal tie. Figure 1 illustrates a two-spoke thermal tie. Specifically, it represents the plane and the method used to thermally isolate the plated through-hole from the plane while connecting it electrically.
Figure 1. An Example of a Thermal Tie
There are a number of questions that arise relative to the use of thermal ties including:
First, thermal ties are needed only when connections are being made from component leads to a plane when the lead is actually being soldered into the hole itself. Surface mount parts do not require thermal ties and they should not be used with these types of parts.
From a thermal point of view, one spoke, or tie, is preferred. However, this can result in lost connections if the holes are placed too close to one another. Thus, the number of spokes needed depends on how closely the plated through-holes are placed to each other. If the CAD system being used is allowed to do this hole placement, it is possible that the holes will be crowded so close to one another that the clearance pad from one hole will break the connection of a thermal tie in another. When this practice is allowed, the two ties depicted in Figure 1 may not be enough.
Due to signal integrity reasons, the holes should not be placed so close to one another that their clearance pads touch or overlap as described above because then slots are created. When this condition is satisfied, two ties are always enough.
Some may question why one thermal tie does not suffice. Figure 2 shows the two-tie solution along with the drilled hole. There are two conflicting goals that must be met when designing a thermal tie-- achieving maximum thermal isolation while maintaining a good electrical connection.
Figure 2. Thermal Tie Design for a Drilled Hole in a Power Plane
With the foregoing goals in mind, you want to make as few connections as possible and make the connections or ties as long as practical. In most dense PCBs, the size of the clearance pad has been reduced to the absolute minimum needed to account for all of the manufacturing tolerances. As a result, the difference in the diameter of the clearance pad and the capture pad is usually 5 mils per side or 10 mils total. The capture pad is normally 10 or 12 mils larger than the drill diameter and the clearance pad is 10 mils larger than this. In order to increase the length of the thermal tie, the capture pad is made only 5 mils larger than the drill size. This will result in the breakout as shown in Figure 3 if the worst case drill wander happens.
Figure 3. Thermal Tie Illustrating Breakout
As depicted in this figure, even when the drill is off-center, one of the ties will still make a good connection with the plated through-hole. This means that the balance between reliability and thermal isolation has been satisfied.
Additional questions regarding the two-tie thermal tie structure may arise such as:
Figure 3 is a plot of resistance versus trace width and trace thickness. If the thermal tie in Figure 3 is 5 mils wide, 7 mils long and made from ½ ounce copper, its DC resistance will be approximately 1 milliohm.
Figure 3. Trace Resistance vs Trace Width and Trace Length
This is far less than the resistance of the component lead frame soldered into the hole. A trace of this geometry will have an inductance of approximately 0.14 nanoHenrys. This factor is very small compared to the inductance of the lead soldered into the hole. Therefore, from the electrical point of reference, a two-tie thermal tie is more than good enough.
In the final analysis, a thermal tie structure containing only two ties provides the best balance between electrical and thermal considerations. This is especially true when connections are made to multiple planes such as ground planes.
Pad stack design is not just limited to the design process. When it comes to all of the elements associated with the number and variety of holes in a PCB and the appurtenant structures and processes associated with them as well as the overall manufacturability and reliability of any given design, there are a number of factors that have to be taken into account throughout the entire design-to manufacturing-to- assembly product development cycle. Doing so at the front-end of the design process ensures that you will have a design that satisfies specified performance parameters, meets cost and deadlines, and will work correctly the first time.
Would you like to find out more about how Altium can help you with your next PCB design? Talk to an expert at Altium or read more about designing to meet thermal demands with Altium Designer®.