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    PCB Design Tips for SRAM Users: How to Prevent Data Loss

    Altium Designer
    |  January 28, 2019

    SRAM data loss

    SRAM loses its data when power is removed.

    One of the best inventions in editing software is the autosave feature, which prevents Murphy’s Law from striking at the worst time. Decades ago, I nearly cried when several pages of an important university assignment were literally wiped out, as the non-existence of the autosave feature was made worse by my reluctance to hit the ‘Save’ button.

    In electronics, you risk losing the entire data stored in a Static Random Access Memory (SRAM), if you’re aware of the challenges when designing with an SRAM. This can cause unpredictable operations of the hardware, especially if the SRAM stores critical variables.

     

    What is SRAM and How Does it Work?

    The SRAM is a non-volatile memory that is commonly used in embedded system design. It stores information in logical bits and retains the value as long as it is supplied by an operating voltage. Once the power is removed, the entire SRAM will be reset to its default value, usually equivalent to logic 1s.

    The internal of an SRAM is constructed by multiple cells. The cells contain bistable flip-flops which are controlled by a couple of transistors. When information is stored in specific addressed, some of the flip-flops will be latched accordingly to represent the digital value of the data.

    Despite SRAM’s inability to retain information when powered down, it is regularly used in designs that require additional working memory. Compared to other volatile memory components like Flash and EEPROM, the SRAM has negligible read access time and the data can be written on random memory addresses.

    As with other electronics components, SRAM has undergone improvements throughout the years. Gone were the days when SRAM was a massive component with over 40 pins and parallel address bus was still a popular interface. Today’s memory manufacturers produce SRAM with serial interfaces like SPI and I2C, drastically reducing the form factor to as low as 8 pins.

     

    Top Considerations When Designing With an SRAM

    SRAM design details

    Giving your SRAM design extra thought could make a big difference.

    Designing with an SRAM may seem like a simple task. After all, what could be so difficult about designing with a low pin count memory chip? Well, experience has taught me that many things can, in fact, go wrong. From part selection to post-production issues, a considerable number of issues might be encountered. Here are some tips to help beginner-level PCB designers:

    Memory Capacity

    Should you choose the SRAM with the highest capacity? Or pick one that fits the project requirements? This is a question that bothers firmware developers rather than hardware designers. Memory manufacturers usually introduce SRAM of different capacities in the same physical package. This means that you do not need to alter your design when the choice of memory capacity changes.

    Interface Type

    The most popular interfaces used by SRAM are SPI and I2C. SPI requires four physical pins to write and read data while I2C only requires two physical data connections. Generally, SPI offers faster access but requires an individual control signal for every single IC on the SPI bus. I2C is ideal when you have multiple memory chips connected to the microcontroller as it only requires a data and clock signal.

    Decoupling Capacitor

    With innovative non-volatile memories like Flash and FRAM, it is unlikely that you’ll be designing a battery-backed SRAM. While this certainly makes SRAM design easier, it doesn’t mean you can overlook the importance of a stable power supply. Always ensure that a decoupling capacitor is placed as close to the Vcc pin of the SRAM. The last thing you want is data corruption due to power instability. A decoupling capacitor also helps prevents issues with ground bounce.

     

    Signal Traces

     PCB data integrity

    Follow PCB best practices to maintain data integrity.

    Whether you are using an SPI, I2C or a parallel SRAM, you’ll want to ensure that no propagation delay issues corrupt the data while it’s being written or read. This means the usual best practices apply: route data signals parallel to each other and far away from other high-frequency traces.

    Ground Plane

    A generous area of ground plane underneath the SRAM can help increase the stability of the component. It can also help prevent electromagnetic interference from an external source from affecting the SRAM. You can easily place a solid ground plane with the polygon tool from Altium.

    Using PCB layout software like Altium Designer® helps you route seamlessly, prevent data loss, and avoid unnecessary issues like instability or interference. If you need more helpful tips with SRAM in your PCB design, talk to an Altium expert today.

    About Author

    About Author

    PCB Design Tools for Electronics Design and DFM. Information for EDA Leaders.

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