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    Reading Impedance Profiles of High Speed Backplanes

    Jason J. Ellison
    |  September 10, 2019

    Impedance remains a confusing topic in the signal integrity community. By definition, impedance is the ratio of voltage to current. That doesn’t really paint a clear picture to anyone. Getting more specific, the term impedance can mean several things. 

    • Step response of broadband reflection coefficient in ohms
    • Impulse response of broadband reflection coefficient in ohms
    • Time domain Z-parameters
    • Frequency domain Z-parameters

    Signal Integrity engineers are usually talking about the first bullet point when we refer to impedance. Therefore, the impedance in the frame of signal integrity is quantifying and locating reflections. It is also the direct output of a Time-Domain Reflectometer (TDR) and is something that contains valuable information once you can read it. So how can you learn about reading TDRs without having a TDR? 

    If you have S-parameters, you have the information required to calculate a TDR’s output instead of measuring it. S-parameters at a given frequency are a square matrix, and the reflection terms are the diagonal elements of the matrix. The process of converting the reflection S-parameters to impedance follows.

    1. Extrapolate the DC point
    2. Interpolate the S-parameters so that ?f and the first non-DC point are the same
    3. Filter the S-parameters if desired
    4. Calculate all negative frequency components
    5. Calculate the time-domain impulse response by taking the inverse Fourier transform of the symmetric S-parameters
    6. Shift the time-domain vector so that t = 0 is the middle point.
    7. Convert the impulse response to the step response
    8. Calculate impedance from reflection coefficient

    Using programming languages like MATLAB, Octave, or Python makes these steps relatively easy. However, it is really unnecessary. You can simply download Teledyne LeCroy’s Signal Integrity Studio and use it to calculate the impedance profile for you!! That’s assuming you have S-parameters.

    It turns out there are high quality S-parameters that are freely available for download. The IEEE 802.3 asks participants of their standard working groups for S-parameters of relevant channels, and they post these channels on their website. Here are several repositories of S-parameters found on the IEEE 802.3 website.





    You’ll see some suffixes that go with each of these channels. CR4 and KR4 are the most common. Anything with CR is a cable assembly and anything with a KR is a traditional backplane or orthogonal backplane. You can compare these to a channel you’re designing or just check out how performance levels have evolved. I’m going to use them to show an example of an impedance profile and how to interpret it.

    The first channel I want to show is a backplane measurement donated by TE Connectivity. You can find it here.

    I’m going to go through the procedure for loading the S-parameters into SI Studio and plotting impedance. To load the S-parameters into the tool, click the little folder icon on the left hand side of the GUI’s control panel. It will prompt you to select a touchstone file. Touchstone files contain S-parameters and have file extensions that start with S, end with P, and have a number in between. That number is the port count in the touchstone file, and you can think of a port as a place you can place an imaginary broadband power meter if one existed. The touchstone file I am using is TEC_Whisper27in_THRU_G14G15.s4p. This system is differential, and the S-parameters need to be converted from single-ended to differential to view the differential impedance. To do this in the SI Studio, click the “convert” button to the right of the folder icon in the middle of the GUI control panel. A pop-up will appear that asks you the file’s port map. In this file, port 1 connects to port 2 and port 3 connects to port 4. To translate this information into the pop-up, make the numbers on the left 1, 3, 2, and 4 from top to bottom. Then click apply and close the pop-up. The reflection S-parameters are shown as “SD1D1”. Uncheck all other boxes, and change the reflection S-parameters to impedance by clicking “dB” and selecting “Z”. That's it!

    To get the best view of the channel’s impedance, select “single grid” from the display drop-down in the toolbar, set the horizontal center to 3ns, the horizontal scale to 0.6ns, the vertical center to 100ᘯ, and the vertical scale to 5ᘯ. The final result is shown below with references to all items discussed above. 

    Teledyne LeCroy Signal Integrity Studio interface with TE Connectivity’s backplane loaded and important controls highlighted

    Figure 1. Differential impedance profile of TE Connectivity’s backplane.

    Now that you have the impedance in front of you, what is it showing? 

    An impedance without any reflections will be 100ohms across the entire length of time available. Any change in the impedance profile is a reflection. You can see there are several places where there are significant reflections where the impedance dips low. There are also segments between these dips that appear to be smoothly rising up. 

    The dips are transitional media. Starting from the left, the first dip is the coax connector. The second is a mated connector. The third is another mated connector. Transitional media like connectors or vias are almost always dips in the impedance profile. So if you see dips, you’re probably seeing a via or connector. 

    A common misconception is to automatically think a via’s low impedance is caused by the drill diameter. However, the dips from vias are usually caused by the via pads. Pads are a necessary evil to a signal integrity engineer, and the pads always cause an impedance discontinuity. There is the possibility that the via impedance is high. That occurs when the via is designed with the smallest manufacturable drill size based on the PCB thickness instead of optimizing the via and pad separately. Consult your nearest signal integrity engineer for details. 

    The connector’s low impedance is not as easily explained. Connectors are complex structures that have many small discontinuities and a few large ones. Typically, connector related impedance discontinuities are low impedances. This could be from clumps of solder on SMT pads or it could be the mating interface. However, if the connector is not fully engaged (mated) there will be a high impedance in the middle of the connector’s impedance. 

    The smooth segments are traces. Traces have small perturbations from fiber weave and surrounding metal such as pinning vias, but they are fairly flat. The rising slope of the traces is caused by the frequency dependence of impedance. This is a sign that the S-parameters are well behaved and physical. 

    The last S-parameter I’d like to look at is a backplane donated by Intel for the latest IEEE Ethernet standard that is defining 100Gb/s! Download it here.

    This backplane is completely simulated and contains a BGA breakout (or at least what appears to be a via). A BGA breakout is where the PCB artwork transitions from the BGA component footprint to PCB traces. This is done in one of two ways. 

    1. Via-In-Pad
    2. Dog-bone

    Via-in-pad is straight-forward. It is where the signal via is placed in the center of the BGA signal pad. Many designers are against using via-in-pad. The reason is the BGA will not attach to the board if the via is not processed correctly. A via-in-pad needs to have the via’s hole somehow sealed. This is usually done by either capping or filling the via then plating it. Clearly, this will cost more money, which is another reason people avoid it. However, this is the best option for signal integrity.

    Dog-bones are a short trace from the BGA signal pad to another pad. This forms the so-called dog-bone shape. The via is placed on the second pad, away from the soldered BGA ball. This eliminates the need for capping and filling vias and is the least expensive option. This option is more challenging to engineer for signal integrity. The transition from BGA pad to via pad creates a high impedance. This impedance is noticeably high in most scenarios because a reference plane is usually not directly under the trace. 

    A BGA footprint illustrating both via-in-pad connections and dog-bone connections

    Figure 2. Example of a Via-In-Pad and Dog-Bone breakout.

    Looking at Intel’s thru model (Cable_BKP_24dB_0p995m_more_isi_thru1.s4p), there is a high impedance at the beginning where the BGA breakout is expected to be. Since a BGA breakout is very small, it is nearly impossible to tell if this is from the via diameter or a dog-bone. However, it is likely from one of these two geometries. 

    Teledyne LeCroy Signal Integrity Studio interface with Intel’s backplane loaded, showing an impedance dip where the dog-bone connection is present

    Figure 3. Differential impedance profile of Intel’s backplane.

    So, there you have it. A way to view impedance and some features to look out for. Specifically:

    • Low impedances could be connectors, via transitions from via pads, or out of control clumps of solder on SMT pads.
    • High impedances could be from via drills that are too small, partially mated connectors, or dog-bone BGA breakouts.
    • Flat sections with a slow rise over time are PCB traces, and the rise of these traces is a physical phenomenon that should be there.

    Hopefully you can look at your next impedance profile with confidence!!

    Find out more about signal integrity tools for PCB designers in Altium Designer®. Have more questions? Call an expert at Altium.

    About Author

    About Author

    Jason J Ellison received his Masters of Science in Electrical Engineering from Penn State University in December 2017.
    He is employed as a signal integrity engineer and develops high-speed interconnects, lab automation technology, and calibration technology. His interests are signal integrity, power integrity and embedded system design. He also writes technical publications for journals such as “The Signal Integrity Journal”.
    Mr. Ellison is an active IEEE member and a DesignCon technical program committee member.

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