The Rough Journey of a Hardware Engineer and Assembly Options
Table of Contents
Life, for a hardware engineer, is a continuous battle.
Every day, every single decision, circuit, connection, net, trace, VIA or pad is a fight between Physics and the demanding, albeit important requirement that has been thrown on the desk by the archenemy of the poor hardware engineer: the colleague working for the marketing team.
A good (and at the same time sobering!) thing is that Physics always wins.
The task of the hardware engineer is therefore to make sure that he finds the right compromise that makes the marketing team colleague think that he actually won.
This is of course a deliberately, exaggerated hyperbole of a situation which might sound familiar to many colleagues, more or less on the same level of the sentence: “Can we have one assembly option to allow more than one solution on the product?”
This sentence brings us to the main topic of this blog: assembly options.
It might be the second biggest enemy of a hardware engineer but, quite often, the closest friend.
I work at Toradex and we design System on Modules, also known as SoMs, based on NVIDIA and NXP SoCs.
These are tiny, embedded computers which have on board the main processor, RAM, flash memory, Ethernet PHY, audio codec, power converters. Many components – in the case of the smallest products – in the size of about 37mm by 68mm.
Toradex Apalis and Colibri System on Modules
The pictures above make it obvious that only a carrier board can breathe life into the embedded computer modules. A 3.3 V-power supply voltage, for example, and a connection to the external world are essential.
Toradex computer modules belonging to the same family are, whenever possible, pin compatible. This means that all the interfaces, including the high-speed ones, power supply rails, power GNDs, etc. need to be routed always to the same correct pins, no matter where these interfaces are located on the main processor used on the module.
While working on the SoM PCB layout, many times you have to route 10 differential pairs of a dual channel LVDS LCD interface from the top right corner of the processor fine pitch BGA footprint to the far bottom left part of the SoM, making sure that there is a maximum intra-pair skew of 1 ps ≈150 μm and a maximum trace length skew between clock and data pairs of 3.5 ps ≈500 μm.
If you also have to design assembly options, which allow for different SoCs, RAM and flash configurations or even exposing on the main module edge connector interfaces which deviate from the ones normally featured by the standard pinout, the situation gets even more complex.
Therefore, the embedded computer module approach is so worth using: our customers don’t need to deal with all of that.
We take over that work! Even if customers decide to integrate more RAM or faster CPUs, they just must replace the SoMs. No changes or assembly option on the carrier board are necessary.
The latest sentence is not always necessarily true, let’s try to understand why.
Even though the embedded computer module approach removes a lot of complexity from our customer’s desks, a proper carrier board design can also give rise to snares.
At least most of the time, if you look closely at a modern Arm SoC, you will find that each pin is highly multiplexed.
Toradex allows its customers to use these alternative functions, to accommodate less common interface configurations.
If a customer decides to do this, but at the same time likes to keep compatibility with a wider range of SoMs, he will need to incorporate, you guessed it, assembly options.
This can be a complex task as there are many modules and each pin can have up to 7 alternative functions.
Toradex provides a very handy tool called Pinout Designer which helps our customers to eliminate – or at least reduce – assembly options to a minimum.
It shows the pins which are in a conflict status and guides the user towards the ideal Pin Muxing solution which offers the widest compatibility across other modules belonging to the same SoM’s family.
Toradex Pinout Designer Tool
By now we should have figured out that assembly options are often required and are also quite useful in many situations.
Let’s try to list a few of them in which assembly options are also insidious.
Differential pairs and, in general, high-speed signals on PCBs are to be treated as transmission lines. The impedance of these transmission lines is related to the trace geometry and distance from reference planes. Matching the impedance of the source, sink and transmission line reduces high-speed signals reflections on the line.
Capacitor and resistors normally used to implement assembly options are representing impedance discontinuities and, therefore, it is important to take particular care to properly select these components. In general, smaller packages have less impact on the impedance.
It is also important to place them correctly on the PCB in order to reduce discontinuities and trace stubs towards the not assembled components.
As a rule of thumb, stubs longer than a tenth of the wavelength should be considered as problematic.
We use quite often two resistors in shared pad configuration in order to create a stub-less Y-connection between two alternative assembly options.
Resistors shared pads configuration for two assembly options of differential pair routing
Single resistor assembly options can be implemented by using a daisy chain approach, connecting the first device and placing the assembly option zero-ohm resistor right next to it. This way, if the first device will be assembled, the resistor will cut the stub toward the second device. If the second device will be fitted, there will be only the short stub represented by the empty footprint pads of the first device.
Daisy Chain Routing to implement assembly options using a single resistor or capacitor
Altium Designer provides several ways to create variations of the same original design. Each component contained in the base design can be configured in the variant manager. Possible options are: Fitted with Varied Parameters, Not Fitted, or completely replaced by an Alternate Part.
The related Altium documentation explains perfectly all these options and all the related details.
To conclude, I would like to give you some insights on a real design I was working on, which used a big amount of assembly options, for flexibility and, let’s say, safety reasons.
A few years ago, I have been working on the design of the Toradex SoM Functional Tester. It is a device used internally in Toradex to perform the production testing and programming on each Colibri and Apalis computer modules before the products get delivered to customers.
Back then, we received a couple of customer support requests related to Ethernet capacitive coupling and, since we never tried such solution on any of our products, I thought that the best way to give them a reliable answer was to use the SoM Functional Tester as…tester (it makes sense!) for this solution.
This alternative circuit test had to be done in the safest way as possible and because of this, I decided to allow through assembly options both possibilities: capacitive coupling and standard Ethernet magnetics.
Each magnetics connection was optionally replaced by using 0402 100 nF series capacitors and I also used zero-ohm series resistors placed inside the Ethernet magnetics footprint area in order to have a completely stub free solution, in both assembly configurations:
Ethernet Magnetics vs Capacitive coupling assembly options implemented on the Toradex SoM Functional Tester
Assembly the magnetics as default option would have been the safest solution, but I went instead for the one using decoupling capacitors: unsoldering by hand almost hundred 0402 capacitors is way easier than soldering them!
End of story: all the SoM Functional Testers we ever produced are using the capacitive coupling solution and the Ethernet magnetics I ordered as a safer backup are still somewhere in a drawer of my desk.