Top 10 DFM Problems That Affect Every Design

Created: February 10, 2017
Updated: October 27, 2020

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Learn how to prevent the top 10 Design for Manufacturability (DFM) issues in your next PCB design project with these strategies.

As a PCB designer, you manage a variety of different requirements and expectations.There are electrical, functional, and mechanical aspects to consider. In addition, the PCB has to be produced in a timely manner, with the best possible quality, at the lowest possible cost. And through all of these requirements, you also need to factor in DFM (Design for Manufacturing). It’s a big part of the PCB product design process, and one which can frequently cause problems if not done properly. Let’s take a look at ten of the most common DFM problems that you can run into in your PCB design, and some design alternatives that can help you avoid these issues.

IPC BASED FOOTPRINT GEOMETRY

The contact pads for the components of a printed circuit board are a critical element for determining whether or not a component can be reliably soldered. With an IPC-based footprint design, you can ensure that the PCB’s components can be soldered later on in the manufacturing process, without errors.

Detailed Customization Within The IPC Footprint Wizard

Detailed Customization Within The IPC Footprint Wizard

EVEN CONNECTION OF COMPONENT PADS

For SMD components with sizes 0402, 0201, or less, it’s important that pads have a uniform connection. This will help them avoid tombstoning — i.e. components partially or completely lifting off the board during reflow. It’s also important to maintain uniform connections with BGA pads in order to assure reliable soldering results. The test procedure to guarantee this is complicated and costly, often involving X-rays.

Pads for SMD Components Should Have Pads with Uniform Connection to the Device to Prevent Tombstoning during Soldering

Pads for SMD Components Should Have Pads with Uniform Connection to the Device to Prevent Tombstoning during Soldering

VIAS IN SMD PADS

It’s a commonly shared bit of PCB design wisdom that you should avoid via-in-pad at all costs. When soldering, the via hole can lead to a weak soldering joint, which can ultimately damage the circuit. However, via in pad does have a place in PCB design, and can be particularly helpful with issues like heat management.

Use of Via-in-pad Should Be Avoided; Vias Should be Separate from the Pads

Use of Via-in-pad Should Be Avoided; Vias Should be Separate from the Pads

EVEN COPPER DISTRIBUTION ON COPPER LAYERS

The process of creating a copper image on an individual board layer is dependant on many factors. If the copper is removed from one area, it can be difficult to keep a single track standing. Because of this it is recommended to keep the copper distribution even as much as possible.

Even  Distribution of  Copper Creates the Most Reliable PCB

Even Distribution of Copper Creates the Most Reliable PCB

COMPONENT CHOICE AND PLACEMENT

Many designers try to use through hole technology (THT) components as little as possible, often keeping them on only one side of a board. However, the use of THT can be unavoidable at times. Depending on the combination of THT components on the top layer and SMD components on the bottom layer, all of the components must generally be placed together as close as possible. In some situations, this scenario excludes the option to use one side wave-soldering. Rather, more expensive soldering processes must be used instead, such as selective soldering

When Using Through Hole Components, Place Them on One Side and SMD

When Using Through Hole Components, Place Them on One Side and SMD on the Opposite

LAYER OR VIA OFFSET

The creation of PCB output data is the last tolerance-free process in the manufacturing chain. PCB fabrication has tolerances, which affect the copper layer image as well as the drilling of vias. The printed circuit board fabricators are then able to drill the PCBs in groups of three or four, rather than individually sequenced.

Layer and Via Offset is Critical to Maintain to Allow Groups of PCBs to be Drilled

Layer and Via Offset is Critical to Maintain to Allow Groups of PCBs to be Drilled Simultaneously

If you imagine this layer and via offset visually, with drilling occurring in a pack of three or four PCBs, we see that things like the minimum annular ring and teardrops are important tools to help the PCB designer increase the fabrication yield. This in turn will help lower the overall cost of fabrication.

Navigating the Hierarchy

Navigating the Hierarchy

Using at Least the Minimum Annular Rings and Employing Teardrops

Using at Least the Minimum Annular Rings and Employing Teardrops are Tools to Maximize Fabrication Yield

UNCONNECTED VIA PADS

By removing unconnected and unused inner layer via pads or THT component pads, PCB fabricators are able to preserve their excellon drilling tools and make them last longer. However, PCB designers don’t like this practice. From an electrical point of view, this practice may have no bearing on the final product, but there’s the possibility that removing the pads may weaken the physical shell. If a designer doesn’t want the pads removed then it is recommended to make note of this in the design specifications.

Annotations to  the  Fabricator About Unused  Pads  Removes Guesswork

Annotations to the Fabricator About Unused Pads Removes Guesswork During Production

SOLDER MASK

Many PCB designers use a practical value of approximately 50µm for defining the circumference of pads, and a minimum distance of 50µm for the residual coverage to the next trace as well. However, if you want to have a solder mask bridge between two pads, it should be at least75µm wide. These factors should be taken into account during the preparation of thecomponents in a library, as well as when the components are placed on the PCB. Otherwise, it can result in minimal distances that are too small and the mask may not fill in properly between pads.

Minimum Spacing Between Pads Should be 75µm to Ensure Enough Room

Minimum Spacing Between Pads Should be 75µm to Ensure Enough Room for the Mask to Fill-in Completely


PLANE DESIGN AND CLEANING LAYERS BEFORE CREATING OUTPUT DATA

Placing the vias may lead to certain areas being cut. However, this can be avoided by making small changes to the placement of the via as shown below.

If you Don’t Want Copper Removed, Place the Vias

If you Don’t Want Copper Removed, Place the Vias Close Enough Together

Also note that the acute angle of traces can be problematic for PCB fabrication. If possible, the PCB designer should clean this up at the end of the design.

If you Don’t Want Copper Removed, Place the Vias Close Enough Together

If you Don’t Want Copper Removed, Place the Vias Close Enough Together

SMD DIRECT CONNECTION

Directly connecting two SMD Pads in or under the SMD Component might be an acceptable electrical shortcut for the moment, but it can cause problems during later testing. For example, during AOI (Automated Optical Inspection), the camera might not be able to detect a short because soldering a correct connection to the SMD pad interferes with the visual inspection process. Small changes in the PCB design can clear this up, however, and make things easier for everyone involved.

Connect SMD Pads Externally to Facilitate AOI

Connect SMD Pads Externally to Facilitate AOI; Connections at the Pads or Under the SMD Makes Inspection Difficult

CONCLUSION

Designing today’s electronics is no easy task and requires consideration of electrical, mechanical and functional aspects throughout your entire design manufacturing process. Design for Manufacturing presents yet another set of challenges to get a board successfully manufactured right the first time. By following the ten guidelines outlined in this white paper, you’ll be well equipped to define proper component placement, layer stackups, solder mask constraints, and more that match the guidelines required by your manufacturer.

 

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