As noted in several of my blogs as well as those of others, signal integrity is one of those elements within a high speed PCB design that has to be factored in from the start of the design concept. From its inception, signal integrity is carried through from design to board fabrication and final assembly. But, there are aspects where signal integrity is not always at the forefront of the design process, including the creation of the PCB stackup. This article will examine the affect of board stackup on overall signal integrity. It will also address how to balance cost and efficient manufacturing against a design’s overall signal integrity requirements. Central to the process is the establishment of a “partnership” between the engineering department and the board manufacturer, who work together to ensure that any PCB design is “buildable” as designed.
Stackup Design Review
Before delving into specific aspects of board stackup design, it’s useful to review what is meant by stackup design and what needs to be accounted for relative to SI considerations.
A stackup or stackup drawing shows the arrangement and types of layers in a multilayer PCB. Figure 1 is an example of a stackup.
Figure 1. A Stackup Drawing with all Necessary Data
In addition to the arrangement of the layers, the stackup drawing must also contain thickness information for the copper and dielectric layers as well as information regarding the kind of dielectric used. It’s important to note that the exact type of laminate, prepreg and copper has to be called out at every point in the stackup of a complex, multilayer board. None of these choices can be left up to the fabricator and at the point of manufacture, the fabricator has already agreed to what has been specified by the product development team.
Gotcha Problems and The Necessity for Good Communication
When we are pushing the envelope in terms of high speed PCB performance, loss in the signal path becomes an element of concern. As noted previously, the glass weave induced skew that was plaguing the industry a few years ago has been successfully addressed by mechanically spreading the glass weave such that a uniform surface is maintained. However, now that we know how to control weave-induced skew, it’s of paramount importance that the glass style be part of the manufacturing specifications which cannot be changed by the fabricator. On the surface this might not seem to be an important point but it certainly can become one as noted below.
As I mentioned in another article, not that long ago, we encountered a situation in which a board was prototyped in the U.S. and then sent offshore for volume manufacture in Korea. A two-ply glass style had been specified for the prototyped board but when the product order was released to Korea for volume production, the PCB fabrication engineers thought they would save the customer money by changing the style of the glass weave to a single ply. When we looked at the boards, the waveforms were all over the place. It only took five minutes to diagnose the problem—glass weave induced skew. 400 assembled boards had to be destroyed. No one had explained to the fabricator why the two ply glass was mandatory.
To be fair to board manufacturers, for the past 40 years product developers allowed fabricators to fiddle with a design such that they built it to suit themselves. When boards weren’t complex and didn’t require the number of layers and the tight performance constraints associated with today’s high speed designs, it did not matter if fabricators made changes to design stackups. This was especially true if those changes resulted in a cheaper board. This also meant that the fabricator could switch to a different material that matched what they had on hand. As noted in previous articles, when a board is specified to be built out of FR-4 material, you can get a lot of different boards as a result.
To be sure that your products are built as designed, instructions to board fabricators have to include that no substitutions are allowed and nothing on the fabrication drawing can be changed without prior written consent. In truth, the mandate to produce boards at the lowest cost has been replaced by the mandate that boards be built exactly as specified.
It’s important to remember that just because a product can be designed a certain way, it does not mean that it can be built. As an example, we had a class wherein there was an engineer who had given his stackup drawing to a bunch of different fabricators and all of them said they could not build the board. He determined that all of the fabricators were “stupid”. But in his stackup, he had buried vias going through every pair of layers all the way through the whole stackup. The board was, in fact, physically impossible to build.
In another example, we encountered a board that was so badly designed from the manufacturing point of view, that no one could meet the manufacturability requirements. Again, the blame was placed on the fabricators who were all labeled as being stupid because they could not build a board that was not capable of being manufactured.
In both of the above examples, the criticism levied against the board manufacturers was the result of engineers who did not have practical experience in building boards. In the final analysis, just because you can design a complex board on your computer does not mean that it can be built as you have designed it.
The truth is that fabricators don’t know anything about signal integrity nor should they be expected to. What they do know is their ability to get a specific etching of trace widths, a specific accuracy of thickness and a specific accuracy of plating.
One common error engineers make is asking a fabricator what hole aspect ratio can be plated. Instead, with plating, the goal should be to make the vias conduct and then make sure that the dimensions work for successful plating. Fabricators may say that they can plate to 14:1 or 16:1. But this is only possible when plating is done by hand.
The reality is that you should never go above an aspect ratio of 10:1 if you want to get a reliable board. When you think about it, it’s amazing that fabricators can commit to this number. Think about a panel sitting in solution—the density of exposed copper is not uniform. Add to it that the plating current is also not uniform. Where the features are far apart, you have very high plating currents and lots of plating. As a result, this causes problems specifically with press fit connectors and very high pin count BGAs.
When lowest cost dominated the design arena, changes and substitutions to board stackups were not only acceptable, they were the goal of both the designer and the manufacturer especially if they resulted in a cost savings. Today, creating a buildable design that satisfies all its performance requirements, including signal integrity, becomes the primary concern. Trade-offs between performance and manufacturability to achieve the highest level of cost-effectiveness is definitely part of the process. But a critical component in achieving a board that is built right the first time is to establish a proactive partnership between the engineering design team and the board fabricator. And, it’s an absolute necessity that this dialog begins at the early stages of design. This is the only way to ensure that the board you have so meticulously designed can be manufactured in the most efficient and cost-effective way possible while still meeting all operating specifications.
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