Clock Management with Multiplexing, Retiming, and Buffering

Created: October 7, 2025

Despite the growth of serial buses which use both source-synchronous and embedded clocks, system clocks and component-specific clocks are still widely used and will remain a core part of many types of designs. System or subsystem clocks can be used as reference timers for a range of components, providing precise timing at specific frequencies. There are also custom oscillator circuits and RF oscillator components which provide stable reference blocks in mid-type sensors. Application examples include sensing, imaging, pulse or waveform generation, and reference clock sourcing for serial channels.

In some cases, clock retiming, buffering, or cleanup alongside multiplexing are very useful features. In some systems, this can be based on logical conditions which are normally implemented with discrete logic or as logical conditions in the application firmware. However, these multiplexing/buffering architectures require a complex set of components, as well as additional circuitry to enable clock redriving. A mixed-signal processor platform is the fastest way to implement clock retiming and clock multiplexing with additional digital processing based on external inputs.

Clock Multiplexing, Retiming, and Buffering

What is Clock Multiplexing?

Clock multiplexing allows a design to select between multiple clocks or multiple loads, where the system host switches between these clock sources or loads. The switching action in clock multiplexing can be performed based on user input, but more commonly it is based on some logic function in an embedded application running on a microcontroller or other processor. There are many applications of clock multiplexing, but most commonly it is used on CPUs and systems-on-chip. Discrete clock multiplexing circuits are more commonly used in telecom systems, precision measurements, precision timing systems, custom logic in FPGAs, and even in navigation systems.

The two block diagrams below show the most common options for clocks. In these two circuit architectures, a single clock or oscillator circuit can be routed to one of many possible loads, or a single load could accept a signal from many possible clocks.

Clock source selection or clock signal routing to a load are most often executed in digital logic using a microcontroller. This is typically part of the main application logic, and this is normally done because not all microcontrollers can source a clock signal at all frequencies. For example, microcontrollers could create a pseudo clock by toggling a GPIO at its own clock frequency or some fraction of it, or the microcontroller could source a PWM signal with 50% duty cycle which can also act as a clock. In contrast, a multiplexer can switch between clocks which are much faster than the processor implementing the system application logic.

What is a Clock Retimer?

A clock retimer essentially picks up a noisy clock signal, cleans it up, and retransmits a copy of it, ideally with minimum skew. A clock retimer can help extend the transmission distance of a clock signal on the PCB or in a larger system in general. The difference between a clock retimer and a clock multiplexer is that the multiplexer does not perform any kind of cleanup, instead acting as a digitally controlled switch between two signal paths. The retimer also works with a high-speed serial data stream with an embedded clock, where some clock and data recovery (CDR) are used to extract logic in the bitstream before retransmission of a clean signal.

Clock retimers may be designed to work on specific signaling standards or interfaces such as PCIe or HDMI. General-purpose clock retimers do not rely on or conform to specific signaling standards; the main limiting factors are the clock frequency and logic voltage level. As digital components, they cannot be used to clean up a sinusoidal oscillator output, e.g., from an RF oscillator, as these are generally not used as clocks. Clock retimers can also work on interfaces with a dedicated clock lane, i.e., a source-synchronous clock.

Clock signal at the source (transmitter), at the receiver, and after applying a retimer.

What is a Clock Buffer?

A clock buffer provides a similar function as a clock retimer, but with the additional function of fanning out the regenerated clock signal to multiple outputs. A clock buffer makes copies of the input clock signal, also with minimal skew between the replicated clocks and the input clock signal. The outputs from the clock buffer are then routed to multiple loads, all of which are intended to be clocked with the same signal simultaneously. This is normally done because the capacitive loading from multiple loads can degrade the clock signal compared to the case of clocking a single load.

Technically, a retimer could also be used to clock multiple loads in parallel from the same signal. This will depend on the capacitive loading applied by the loads on the clock signal, which would impact the rise time; generally, the rise time of the clock signal will decrease as more loads are added. A buffer overcomes this because each copy of the input clock signal is created independently. This essentially means that each output clock signal from the clock buffer is not impacted by the capacitive load on all other outputs from the clock buffer. By making these outputs independent, multiple loads can be driven without reduction in the edge rate of each clock signal.

Clock Redriver vs. Clock Retimer

Another approach that has similar characteristics as a retimer is a clock redriver. Clock redriving is actually an intermediate step in a clock retimer as it is used to amplify a noisy clock before sampling and cleanup. In this way, a redriver amplifies both the clock signal and any amplitude noise present on the stream of clock pulses. While it technically does not amplify clock jitter, the redriver also adds a small amount of skew.

Just like we saw with retimers, redrivers are available that conform to specific signaling standards, including standards with embedded clocks. A general-purpose redriver circuit would be appropriate for a source-synchronous clock or a master system clock. These could all be used for a clock timing signal generated from a VCO, NCO, or FPGA.

Which Components Do You Need?

I think there are three simple guidelines that can help designers select between a clock multiplexer, clock buffer, or clock retimer:

If you need to switch between loads, use a clock multiplexer
If you need to amplify a clock signal and extend its reach, use a clock redriver
If you only need to extend the reach of a clock signal while removing skew, use a clock retimer
If you need to drive multiple loads, use a clock buffer

Note that these components can be combined together in clock management, but small amounts of skew will accumulate between the input and output clock signals. Take account of this skew when simulating the clock timing in your system. If skew is excessive, you may violate timing margins on the destination interface, which would require some delay to compensate.

A Mixed-Signal Processor Provides Full Clock Management

What if there was a way to fully aggregate clock multiplexing and clock retimer/clock buffering functions into a single component with a small device footprint? This is exactly what you can do with a programmable mixed-signal processor like the GreenPAK line of components from Renesas. These processors provide integrated analog interfaces which can be used for cleaning up incoming clock signals, as well as custom logic which can be used to multiplex clock signals and buffer clock signals to multiple outputs as necessary.

GreenPAK consists of a software suite for analog and logic processing development, as well as a set of integrated circuits that perform the desired mixed-signal processing. Designers build their application using a visual interface in the Go Configure software, which allows for full configuration of each processing block and simulation of the application, the latter of which is critical for applications involving precision timing. Once the system is validated, the application can be flashed onto a GreenPAK chip.

To aggregate features like clock multiplexing, clock redriving, clock retimer, and clock buffering into a single component, the design first needs to receive the clock signal and clean it up before routing it to its destination. The simplest way to take a noisy clock and restore fast edges is to use an analog comparator circuit. You could also create a clock with a duty cycle other than 50%, i.e., a PWM pulse, using a window comparator.

Once the input signal has been detected and a fast edge restored with the comparator circuit, clock multiplexing or buffering can be performed based on user input, which can be processed with the clock signal using an LUT. If the output is being routed to a buffer, the output can be broken into multiple isolated clock signals using separate amplifier circuits.

Because the LUT in this example functions based on external signals coming into the I/O pins, addressing can be applied from a system host processor, or routing of the signal can be selected from user input. If clock buffering or multiplexing needs to be wholly passive and controlled by an indicator signal, then that signal can be applied to one of the input pins and input into the LUT.

The mixed-signal processor components and developer tools in Renesas GreenPAK give designers the ability to develop fully custom digital, analog, or mixed signal ICs. These programmable mixed-signal processors allow consolidation of functions found in clock and signal management circuitry, allowing for smaller, more efficient systems. To learn more, take a look at the GreenPAK components and reference examples.

Whether you need to build reliable power electronics or advanced digital systems, use the complete set of PCB design features and world-class CAD tools offered by Altium to implement your GreenPAK solutions. Altium provides the world’s premier electronic product development platform, complete with the industry’s best PCB design tools and cross-disciplinary collaboration features for advanced design teams. Contact an expert at Altium today!