PCB Design and CAD Software: Know What Governs Your Designs

Altium Designer
|  Created: March 30, 2018  |  Updated: September 25, 2020

Using an electronic device for a law related document

Every now and then, the phrase “rule of law” becomes part of conversations about how countries govern. Going all the way back to the 13th century Magna Carta, the “rule of law” speaks about the development of peaceful and equitable societies—and the need for basic human rights. Individuals living under the “rule of law” enjoy

  • Equality under the law
  • The transparency of law
  • An independent judiciary and
  • Access to legal remedy.

Without rules for governance, we would witness the lack of consistency that leads to chaos. The same applies to PCB design. Without a solid foundation of electrical and design rules, the frenzy of digital and analog signals operating at different frequencies would become noise. A world full of noisy circuits would seem less than pleasing when smart dishwashers in 9 out of 10 homes radiate signals detected by spy satellites.

When we use CAD software to design PCBs, electrical rules govern the board layout process. For example, after placing your components, you will need to route the power, ground, and signal traces so that the traces match the schematic and to ensure that the design observes signal integrity, RF, and EMC design rules.

There's Electricity in the Air

While there are some rules which are apparent all over, it might not be as applicable for your PCB designs to follow a speed limit while you’re standing around your computer. Common electrical rules for PCBs include:

  • Clearance
  • Short circuits
  • Unrouted net
  • Unconnected pin
  • Unpoured polygon

Clearance: Without the correct distance between PCB traces, flashover can occur. Clearance defines the minimum amount of clearance allowed between any two objects on a copper layer. In the United States, the UL 60950-1 standard provides the minimum allowed PCB spacing for battery-powered and AC-powered information technology equipment. Tables within the standard documentation specify the clearance distances for traces in terms of working voltage, degree of pollution, the PCB material group, and the coating.

Short Circuits: Increasing the amount of component density for a PCB design establish the environment for a short circuit. Oftentimes, designs will attempt to counter density issues by using smaller component pads. However, the narrow distance between the smaller pads may allow solder bridges to form. The use of smaller pads also leads to problems with trace routing that—in turn—crowd connections and affect solder joints. Either of these conditions can create the environment for a short circuit.

Kirchhoff’s current law diagram

There are a number of laws important for voltage and current to follow.

Unrouted Net: After creating the board outline, the PCB design process moves to part placement and the configuration of footprints for design devices. The pins of each placed part need to connect before we can call the design complete. Our PCB design tools represent each connection between parts with a wire.

A net includes the entire string of points, component lands, and vias from the first source point to the last source point. Different nets have varying widths because of the need to carry different amounts of current.

The net serves as a design guide that tells us that two pins must connect. With the net established, the next stage of board design involves routing the net connections between the parts. The routing process converts net connections into copper trace that physically connect the parts in the PCB prototype.

A routed net has all component pads connected through tracks, arcs, pads, vias, and polygons. An unrouted net represents bad connections, poor connections, or incomplete connections within the net. A track that only slightly touches a via will cause an unrouted net error.

Unconnected Pin: The unconnected pin rule adds redundancy to the overall check for bad or incomplete connections. An unconnected pin does not have an assigned net or any connected tracks. When designing your PCB, check for unconnected pins at the schematic level. If the design intentionally leaves the pin unconnected, mark the pin as “No ERC.”

Unpoured Polygon: Polygon pours symmetrically balance the copper distribution on multilayer PCBs. As a result, the board becomes less prone to warping, bowing, and twisting during the manufacturing process. Good copper balance has uniformly distributed traces within each layer across the PCB. Filling open areas with copper counterbalances the copper in the opposite layer and provides symmetry.

When copper distribution becomes asymmetric, thermal loads caused by hot air leveling, wave soldering, or heat development in reflow can cause PCB warping. A bowed board deforms spherically with the four corners of the board in a single plane. Twisted boards deform diagonally and cause one of the PCB corners to lie outside the plane of the three remaining corners.

Abstract polygon design vector

Ensure that you have proper and necessary symmetry for meeting design requirements

Electrical Rule Checks Bring Everything Together

PCB CAD software uses an Electrical Rule Check (ERC) to verify the accuracy of the schematic and to ensure that your design meets any established constraints. Detecting a rule violation at the schematic allows you to correct the error before the process moves from the schematic to board layout. For example, the Electric Rule Check for short circuits tests for a short between objects located on the signal and plane layers.

With a strong PCB CAD software, you can have the flexibility to associate the ERC reporting level with buses, code symbols, components, harnesses, nets, and parameters. Because of this flexibility, you can check gap widths, trace widths, and the routing of every signal. For these software capabilities, look at Altium Designer.

If you’re looking to talk to someone further about design rules and best practices, talk to an expert at Altium today.

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PCB Design Tools for Electronics Design and DFM. Information for EDA Leaders.

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