PCB Via Noise Coupling in Multilayer PCBs
Call me boring, but as I’ve gotten older, I’ve become tired of taking my dates to bars. Shouting over people just to get to know someone is not my idea of a great time. The funny thing is that as everyone else talks louder, I have to talk louder to compensate. This level of crosstalk creates a vicious feedback loop and does not make for a romantic evening.
Vias are critical features in multilayer PCBs that are used to route connections between board layers. There are a number of potential signal integrity problems that can result from improper use or fabrication of vias. At low frequencies, low speed, or with purely DC circuits, these structures are unlikely to create major signal integrity issues. This is not always the case, and judicious use of vias can help you avoid some signal integrity problems in many PCBs.
Capacitive and Inductive Via Coupling
Crosstalk is normally discussed in terms of adjacent signal traces. Two traces have the potential to send their signals in each other due to electromagnetic induction. The same effect can occur in adjacent vias. The level of crosstalk increases as vias are placed closer together due to the magnetic field generated by propagating signals. Different via structures have different inductance values depending on their fill material, usage of tenting, and aspect ratio.
This issue with crosstalk applies to both digital and analog signals. In traces, the solution is to route traces as differential pairs, where one trace carries the signal and the other carries the return. Just like with traces, vias can also be routed as differential pairs in multilayer boards. The level of crosstalk reduction depends on the pitch between the via pair.
Placing the via pair closer together results in better noise suppression, albeit at the cost of higher parasitic mutual capacitance between the two vias. This capacitance between vias is important in lower speed circuits, where the rise time of a digital signal, or half the oscillation period of an analog signal, is greater than or equal to about 3 times the line delay across the via.
At lower switching speeds and frequencies, the effective capacitor created by this arrangement has time to charge appreciably and then discharge, resulting in a current spike. Thankfully, in high speed designs, the mutual capacitance between neighboring vias has minor effects and becomes negligible as digital switching speeds increase.
Thus at lower frequencies and switching speeds, it is better to use higher aspect ratio vias that are spaced farther apart to avoid capacitive coupling and unwanted discharge in neighboring vias. At higher frequencies and switching speeds, it is better to opt for placing differential via pairs close together to suppress crosstalk. Other traces that are not routed as differential pairs should be placed farther away from other traces to reduce any induced current.
Via pairs on a PCB
Via Noise Coupling to Power and Ground
Besides coupling to each other, vias can also couple noise to a power bus or to parallel power and ground planes in a multilayer circuit board. This is another issue that becomes important in high-speed, radio frequency, and high-density PCB design.
The power and ground planes in a multi-layer PCB can form a parallel plate waveguide with well-defined signal resonances. Vias carrying signals can excite electromagnetic waves in the power/ground planes when the via passes across this waveguide structure and when the via uses the ground parallel plate as a return path.
The large dimensions of the power and ground planes define a set of resonant frequencies that are rather closely spaced. Depending on the edge termination condition, the effective dielectric constant, and the dimensions of the printed circuit, standing waves appear with multiple resonance frequencies inside the power/ground plane.
This forms a high-impedance return current path for other signals that are referenced to the same ground plane. A resulting impedance mismatch can lead to signal reflection in high-speed/high-frequency circuits and all the signal integrity problems that accompany it. The resonance waves also create yet another source of EMI, and this radiation becomes problematic in high-speed, high-frequency, and low-current multilayer PCBs.
A similar effect occurs in a power bus that is mounted parallel to a ground plane and connected to signal vias. Noise injected in from one via connected to a power bus propagates to the remaining vias on the bus. This is due to the spreading of the excited waveguide modes in the power bus. These injected currents propagate as displacement currents and form standing waves in the power bus. Radiation then couples into other vias and signal layers as EMI.
The resonance and re-radiation effect in power buses can be mitigated by placing the power bus farther away from its reference plane. This reduces coupling between the power and ground elements and increases insertion loss of any noise that happens to couple into the power/ground structure.
Unless your printed circuit is operating at high current, it may be best to ditch the power bus altogether. Alternatively splitting the power plane of a PCB prevents induced noise currents from spreading to other components on the PCB.
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