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    Essential PCB Design - Power Delivery Network Analysis

    May 2, 2017

    chip burning

    What’s that burning smell? Hopefully not your prototype.

    Try Altium's PDN Analysis Tool to easily find and prevent issues with your power delivery network.

    I once foolishly decided I would try my hand at woodworking. I thought I would start with something easy, you know, like a rocking chair. With my limited knowledge of structures and statics, I successfully made a chair that broke into pieces as soon as I sat down. The YouTube tutorials I used didn’t mention the part where the chair collapses beneath you. It’s usually a good idea to have an expert to look at something you build before physically testing it. The same goes for PCB power delivery design. You may be a great PCB designer, but I’m guessing you’re not a power expert. Power delivery network (PDN) analysis software can bring all the knowledge of a power professional right to your personal computer. A good analysis program will help you check power integrity, possible temperature problems, and voltage drops before you spend money on a prototype that burns out decoupling capacitors or melts and catches fire.

    Current Densities and Temperatures

    When making my rocking chair I went with the old “eyeball it” method for choosing my strut widths. It turns out that method can leave you flat on your backside. You may apply a similar method when designing traces for your printed circuit board. Choose a width that looks good and put it in, what could go wrong? Power planes that look like swiss cheese and overloaded vias can mean higher current densities and higher temperatures. Power hungry integrated circuits (ICs) can also turn up the heat on your PCB.

    Power Planes: You never really want to “overdesign” your products, but when it comes to copper, no one cares. The only time you’ll get into trouble is if you add excessive power planes. That being said, with designs getting smaller and smaller, power planes are often decreasing in size or morphing into strange shapes. Smaller power planes can lead to bottlenecks with excessive current densities.

    Vias: Vias are another area of concern. You may be too busy designing your vias for reduced EMI to think about how they relate to current. However, vias can congest current on your PCB. Remember that high current densities lead to high temperatures, sometimes hot enough to melt your traces.

    ICs: Gobbling up too much food can put you over the weight limit of even an average chair. New ICs guzzle lots of current, which may exceed the limits of nominal traces. Modern electronics are requiring increasingly faster ICs, which in turn consume more power. 

    amp meter measuring current

    Unfortunately, you can’t buy amp clamps for PCBs.

    A good PDN Analyzer™ will let you check your current densities during the printed circuit board design phase. Many analysis tools will visually show you areas with high current densities on your design. While they may not show you temperatures, heat on your PCB is directly related to current. So, you can kill two birds with one stone and see where your PCB’s currents and temperatures are too high. Then you just need to add enough copper to mitigate both problems.

    Voltage Drop

    Every electrical engineer must learn the mantra of their order, “V=IR.” Legend says if you recite it enough times that Benjamin Franklin (the father of electrical experimentation and rocking chairs), will appear. That mantra is important to remember when designing nets to reduce IR (voltage) drop. Many modern chips not only draw large currents, but also operate at low voltages. If you’re working with a 6 V IC, you may not be too concerned with voltage drop. However, if your ICs are operating at 2V, suddenly any voltage drop becomes a problem. You’ll need to update your design strategy to reduce voltage drops as much as possible.

    So, what’s the best way to reduce IR drop? Obviously the name gives it away. You’ll need to reduce either current, resistance, or both. The best way to reduce current in conductors is to widen them. More metal means lower current densities and less voltage drop. To reduce resistance you should shorten your traces. Less metal means less resistance. Unfortunately, these two recommendations are opposites. Reducing current means adding copper, reducing resistance means losing copper. Fortunately, a great analysis tool can help you figure out which technique to go with. Your PDN analysis should give you a visual map of voltage drop on your board. Depending on the layout, you can decide how to mitigate the IR drop. For example, if you have a short, thin trace with an IR drop problem, you might widen the trace. If you have a long trace with too much drop, try moving around components to make it shorter.

    man banging head on laptop

    Don’t let this be you, use a PDN analysis.

    I thought making something to sit on would be easy, but I turned out to be wrong. The concepts behind PCB power delivery and PDN analysis are simple, but the math involved in finding solutions is complex. Instead of just ignoring problems during design and using iterative “guess and check” prototypes, use a simulator. A PDN analysis tool will do the math for you and show you where the problems will be. Then you can be confident everything won’t fall apart when it’s time to test your first prototype.

    I’ve been saying “good” and “great” this whole time for a reason. There are simulation tools that only output complex waveforms, which isn't too helpful. PCB tools are useless if you can’t understand them. Altium Designer’s PDN Analyser uses visual interfaces to help you pinpoint current density and IR drop issues on your board. Save some prototypes from a fiery death and use it.

    Have more questions about analysis? Call an expert at Altium Designer.

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