Role of Embedded Capacitors in Circuit Board Design

Zachariah Peterson
|  Created: June 20, 2018  |  Updated: June 29, 2025
The Role of Embedded Capacitors in PCB Design

High-density designs often force designers to get creative with component placement, especially with small case SMD passives like resistors and capacitors. Once you run out of space on your top and bottom PCB layers, you have two options: build up and down with a daughter card, or embed components in the PCB stackup.

Building with a daughter card is the natural choice for many designers, but of course it increases the overall height of the PCB assembly once the main board and daughter card are stacked. Sometimes, this is not an acceptable option, and instead the components will get embedded to save board space on the surface layers.

When it comes to embedded capacitors, only certain capacitors will be embeddable due to their size. Small case ceramic capacitors and more specialized capacitors rated for RF systems can be embedded in principle, but there are other approaches that are possible using specialty materials. I will run through the design approach and some options for this type of component amenity in high-density systems in this article.

Embedded Ceramic Capacitors

Ceramic capacitors in standard case sizes are some of the most commonly embedded components. This is typically done as part of power distribution network (PDN) design in high-density, high-speed PCBs. Commercial PCB design software offers support for embedding SMD passives in various ways. Embedded SMD capacitors can use the same footprint as surface-mounted capacitors thanks to their standardized case sizes. Most commonly embedded are ceramic capacitors, as these are most often used. High-frequency capacitors with much higher frequency ratings might also be embedded in the internal dielectric layers.

In terms of creating the PCB CAD data for embedding capacitors, follow these guidelines:

  • Use a standard IPC density level footprint; low or medium density is recommended.
  • Ensure sufficient margin above and around the embedded components to allow room for solder deposition.
  • Pull away copper from the layer above the cavity region containing the SMD capacitor.
  • Cavity regions are milled from the surrounding laminate material, so specify a tool size for the cavity region.

Once the cavity region is specified, it can be defined using a mechanical layer, and the SMD pads can be placed in the required layer by setting the component placement location on the internal layer. You can then route to the pads as usual. The video below shows a more detailed process of placing the embedded component on an internal layer and defining the cavity region.

 

 

Make sure your cavity region is also defined in your fabrication drawing and has the required accompanying fabrication notes. Pick and place status showing placement on an internal layer can be confusing, so an appropriately annotated drawing will help eliminate any confusion.

Embedded Thin Film Capacitors

A more compact approach to embed capacitance into a PCB without fabricating a cavity is to use an embeddable thin film capacitance material. These materials were formerly confined to laboratory environments, but they have become commercially available and are seeing significant use. These materials can be superior to SMD passives when parasitics are considered, as we shall see from the geometry below.

Thin film capacitors are placed as embedded components in a PCB by embedding the film between two etched electrodes which act as the leads for the embedded capacitance film. The etched electrodes can be as small as is required, only being limited by the fabrication and placement capabilities of the thin film capacitance material. This forms the structure shown in the processing steps in the image below, with the capacitor material confined to a thin region of the PCB stackup.

Processing steps for TDK's thin-film capacitor materials. [Source]

These thin film materials are on the order of 1 mil in thickness, so they form a very thin material stack in the PCB stackup. However, this thin layer can give very high capacitance density, and multiple capacitors can be formed within the same layer targeting specific capacitance values. For example, the capacitance density for TDK’s embedded capacitor film products reaches 1 uF/sq. cm. This provides the ability to eliminate many discrete capacitors as needed and instead embed them in an internal layer.

Another important point is that these embedded capacitors have lower ESL value than an equivalently sized SMD capacitor. The inductance along the discharge path from these thin film capacitors will be largely set by the vias and pads used to connect these capacitors to any components on the external layer. This makes their self-resonant frequencies comparable to or higher than equivalent MLCC components in many cases.

Embedded Capacitance Materials

Instead of embedding discrete components or films in the internal layers, embedded capacitance materials are often used to provide high interplane capacitance in power-grounding pairs. Embedded capacitance materials are different from thin film capacitance materials in that they span the entire PCB rather than being placed in a small region between two electrodes. Embedded capacitance materials are premium products that tend to carry higher costs than specialty PCB dielectrics.

Although they carry higher cost, they do not have the ESL parasitic found in discrete capacitors. This means the embedded capacitance material can provide high capacitance into very high frequency ranges, spanning up to approximately 1 GHz. Their capacitive behavior is only limited by spreading inductance, so a PDN that requires very low impedance up to these frequencies can benefit from a thin embedded capacitance material before the on-chip PDN takes over system power integrity.

Typical embedded capacitance material properties and a comparison with FR4 are listed in the table below.

Material options

Embedded capacitance materials

Typical value for FR4

Dk

As low as 3.5 and as high as 30

~4 (prepreg) up to ~4.8 (core)

Loss tangent

Approximately 0.015 at 1 MHz, up to 0.01 or 0.02 at 1 GHz

About 0.02 @ 1 GHz

Laminate thickness

As low as 0.3 mil

As low as 2 mil with open spread glass weaves (e.g., from Isola)

Tg value

Values match close to FR4

~130 °C, high Tg materials up to ~180 °C

CTE value (ppm/°C)

20 to 30

14 (xy plane), up to 70 (z axis)

Copper weights

0.5 to 2 oz./sq. ft.

0.5 to 2 oz./sq. ft.

Copper type

Electrodeposited or rolled-annealed

Electrodeposited, rolled-annealed, or reverse treated

 

Processing limitations on these materials are similar to those in standard PCBs, but be sure to contact your fabricator and learn more about their DFM constraints if you plan to use an embedded capacitance material.

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About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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