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    Sizing Vias in Your Next Multilayer PCBs

    Altium Designer
    |  December 20, 2018

    Vias on a green PCB with a silkscreen layer

    If you’ve ever opened up an old cell phone, you’ve likely noticed the intricate dance between traces and vias. These elements tango with the signal traces on inner board layers, and sizing them properly is as much art as it is science.  Your vias are critical for accessing the inner layers in a multi-layer PCB.

    So how do you choreograph the balance between your vias, traces, and components? Your vias should be sized appropriately if they are to be able to handle the thermal demands without contributing to IR losses while still supporting your components. If you want your device to see broad applications, it is best to use industry standard via sizes.

    Electrical and Thermal Demands in Your Vias

    If you want to access the inner layers in a multi-layer PCB, you’ll need to use vias to route your signal, power, and ground lines. The best via size depends on a number of factors. Most important is your trace width, which is related to trace density, especially in an HDI board.

    If you’re working with a board that uses a lower trace density, fewer components, and a smaller number of layers, you can usually get away with using plated through-hole vias with a relatively large diameter. Your traces can handle higher current and will have lower IR losses.

    Once you need to accommodate more traces on your board and when you have a large number of components, real estate becomes a precious commodity. You’ll need to use thinner traces in order to save board space. In a multi-layer board, you’ll need to use smaller vias to access the inner layers, which increases the aspect ratio of your vias.

    When you need to determine the best via size to use in a multi-layer PCB, you’ll need to have an idea of the thermal demands that your via can withstand. This is a function of the electrical power dissipated in the trace, any appreciable IR losses, and the geometry of your traces and vias. Any heat generated by nearby components can also dissipate into vias and increase their temperature.

    Simulation programs can help you determine the thermal demands in a complex PBC with multiple vias, copper elements, and components. This is really the best way to get a full view of the thermal behavior of your vias. Alternatively, you can use a simple online calculator to get a better idea of the thermal and electrical demands in a via. This can help you get a better idea of which via size you should use if thermal demands are important in your PCB.

    Ball grid array with vias on a green PCB

    Ball grid array with vias on a green PCB

    Via Sizing Calculations and Charts

    Absolute via sizes are not really specified according to industry standards. Instead, only the minimum sizes are specified based on the size of the component that will be mounted on the via. These standards must be followed if your PCB is to be compliant. The IPC-2222 standard specifies minimum hole diameters for plated through-hole vias for different classes of vias as follows:

    • Minimum hole size = Maximum lead diameter + 0.25 mm (Level)
    • Minimum hole size = Maximum lead diameter + 0.20 mm (Level B)
    • Minimum hole size = Maximum lead diameter + 0.15 mm (Level C)

    If you’re not familiar with this terminology, the lead diameter refers to the size of pin on a component that will appear on a particular plated through-hole via.

    In addition to standard via sizes, there are also standardized pad sizes that should be used in compliant PCBs. The IPC-2221A standard defines minimum pad sizes for vias as a + 2b + c, where a is the maximum hole diameter, minimum annular ring size, and c is the fabrication tolerance. The fabrication tolerance depends on whether the vias are mechanically drilled or laser drilled, as well as individual process and machining parameters.

    The maximum fabrication tolerances are defined as 0.6 mm for Level A, 0.5 mm for Level B, and 0.4 mm for Level C. If your manufacturer’s tolerance is less than 0.4 mm, your vias can meet the highest level of certification. Manufacturers usually have different processes that are designed to meet each level.

    Each of the levels above refers to a particular “density level.” Level A is used for boards component with low density and components with a large footprint. Level B is a standard density level that is suitable for reflow, wave, drag, or dip soldering. Finally, Level C is used for HDI boards with very small, dense components.

    If you’re not in the mood to pull out a calculator, you can find charts that tabulate this information on the internet. If your vias involve a larger current and might contribute to IR losses, you’ll want to use vias that are somewhat wider and fill them with a conductive epoxy. This will help you exceed the industry standards on via sizes. The filled via will prevent solder from wicking through the via hole and onto the bottom of the board when mounting through-hole components.

    SMD components and vias on a green PCB

    SMD components and vias on a green PCB

    The best manufacturers can likely produce any via you need. Given the tolerance requirements on vias, you should check with your manufacturer regarding their capabilities. Some manufacturers have gone through efforts to become IPC and/or ISO certified, and you might consider working with these companies if you want to comply with industry standards.

    If you’re looking to build fully-customized multi-layer PCBs, you need a PCB design software package like Altium Designer®. The CAD tools make it easy to design and place vias throughout your multi-layer PCB, and the new-and-improved layer stack manager lets you customize your layer stackup. Download your free trial and find out if Altium Designer is right for you. If you want to learn more, talk to an Altium expert today.

    About Author

    About Author

    PCB Design Tools for Electronics Design and DFM. Information for EDA Leaders.

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