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Three Common PCB Design Mistakes You Can Spot in Your Gerbers

Zachariah Peterson
|  Created: November 4, 2019  |  Updated: September 25, 2020

Vision system on a PCB manufacturing line

Spotting some common PCB design mistakes will help get your board into production faster

I’ll admit that I was not an excellent student until I hit graduate school. At that point, I started putting more energy into my homework than most other areas of my life. Sure, my social life became non-existent, but I soon became an exemplary student and I never looked back.

Just like you need to do your homework while in school, you should do your homework before sending your new design off to a manufacturer. There are some common errors that can pop up in any new design, but you can avoid these problems by closely checking your layout and Gerbers before sending your design off for manufacturing. Checking for these points helps you avoid a no-bid response from your manufacturer and helps increase yield after assembly.

Common PCB Design Mistakes Before Fabrication

Manufacturers that are worth their invoice will take time to check some key points before beginning a fabrication and assembly run:

  • Component availability, cost, and obsolescence

  • Match between schematic, layout, Gerbers, bills of materials, and Excellon files

  • Conformance to the manufacturing process

The first point above requires looking into the supply chain to ensure your components can be sourced within your budget. Checking for obsolescence also ensures your product will have the longest relevant lifetime. Doing this homework assignment on your own, and doing it before you create your schematic and layout, reduces the risk of a redesign and decreases the overall production time.

The second point involves a direct comparison between your design documents. You want to make sure that every drill hole appears in your Gerbers and your drill files. You should also check that every component in your schematic/layout appears in your bill of materials. Some CAD programs will create individual files for every board layer, and its is the designer’s responsibility to ensure that every file required to manufacture a board is prepared and accurate.

The third point really relates to the second point. Manufacturers will typically examine your Gerbers and Excellon files to ensure your design can be produced at full-scale with their processes. Features may look excellent in your layout and your Gerbers, but they may not appear in the same way you imagined (if at all) in your finished product. As a designer, you should consult with your manufacturer or a manufacturer’s representative regarding their capabilities and requirements.

Here are some common PCB design mistakes you can spot if you carefully examine your Gerbers and your layout.

Overlapping or Misplaced Drill Hits

Overlapping two drill holes to try and create a slot is a recipe for disaster. There is an extremely high chance that the bit will break during drilling. Instead, you can use the codes in the Excellon drill tables that will define this particular feature as a slot. Similarly, misplaced drill spots for vias can hit a trace or pad on a surface or inner layer, which will destroy the copper feature.

Both mistakes can be located by turning on all your layers in your PCB layout during your DFM check. With relatively simple designs, your manufacturer can simply move the via for you as this is unlikely to affect functionality. In more complex designs, your manufacturer will be (or should be) hesitant to move any drill holes or vias for you as many more complicated changes may be required. Your design might be sent back to you for changes before your board can be sent into production.

Traces and components on a blue PCB

Do you know how to determine the return current path in this PCB layout?

Solder Mask Clearances Around Pads

Soldermask errors are surprisingly frequent. In some cases, the manufacturer can fix these errors during a design review. In some cases, especially with HDI designs, the manufacturer will send your design back for modification. This will allow to see where your solder mask has accidentally covered pads, holes, or vias. Conversely, solder mask clearances around pads can be oversized, causing nearby copper traces on the surface layer to peek through the solder mask.

Traces are surface-finished (e.g., with ENIG) before applying solder mask, thus the issue with exposed traces is not one of potential corrosion. Rather, the danger with exposed traces around SMT pads involves assembly, particularly reflow soldering. There is a danger in bridging between a pad and a nearby exposed trace, or between two adjacent exposed traces, when the solder mask clearance is too large.

Fixing solder mask errors is simply an issue of turning on all your layers during a design review. Something as simple as zooming into your Gerbers and carefully checking solder mask openings before sending your design off to your manufacturer can prevent a long delay. An experienced manufacturer may notice this immediately, but novice overseas manufacturers may start producing boards without a second thought about your solder mask.

Solder mask clearances are a common PCB design mistake

Watch for solder mask clearances

Super-high Aspect Ratio Blind and Buried Vias

Blind and buried vias are extremely useful for routing between multilayer boards with high layer count. In HDI boards, blind vias on one side the layer stack are useful as they eliminate the need for through-hole vias that span the entire layer stack. This isn’t meant to disparage blind vias; the message here is to use them judiciously and keep an eye on the aspect ratio of your vias.

The conventional wisdom regarding blind/buried vias is that they should only span a single layer. If you need to span multiple layers, then you’ll need to use stacked blind/buried vias. However, some CAD tools will allow you to define a blind via that spans any number of layers, and even through the core of your board. In other words, some CAD tools do not limit the aspect ratio of your blind/buried vias.

High aspect ratio vias may cause your design to receive no-bid status, particularly when attempting to route through the core of your substrate. If you do need to route between multiple layers in a high layer count board, you’re better off using stacked blinds/buried vias for two reasons. First, blind/buried vias need to be plated just like any other via. A larger aspect ratio via can be more difficult to plate throughout the entire via, leading to thinner copper deeper into the via hole. A via with a larger diameter can generally be plated deeper into the via hole. At some point, the via diameter becomes so small that your costs begin to increase as the drill size required to place the via will become so small that it breaks easily during manufacturing, thus laser drilling is used.

The wrong via aspect ratio is a common PCB design mistake

Pay attention to your via aspect ratio

The highest aspect ratio blind via you should use in your board depends on the diameter of your via hole. For larger diameter vias (~10 mils), some manufacturers will place blind vias spanning multiple layers only as long as the aspect ratio does not exceed 2 or 3. Smaller diameter blind/buried vias with similar aspect ratio must be limited to spanning fewer layers. At some point (as long as you are not in the microvia regime) you are better off simply using through-hole vias with more creative routing.

The powerful PCB design and analysis tools in Altium Designer can help you analyze all aspects of your schematics and layout. You’ll also have a complete set of tools for preparing deliverables for your manufacturer. These tools are built on top of a rules-driven design engine, allowing you to perform important verification steps throughout the design process.

Now you can download a free trial of Altium Designer and learn more about the industry’s best layout, simulation, and production planning tools. Talk to an Altium expert today to learn more.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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