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Browse our library of resources to learn more about pcb design and power integrity.
Getting Started With PDN Analyzer
PDN Analyzer for DC Power Integrity
PDN Design for the PCB Designer
Bypass and Decoupling Capacitor Placement Guidelines
Power integrity problems are normally viewed from the perspective of the power supply, but looking at the output from ICs is just as important. Decoupling and bypass capacitors are intended to compensate power fluctuations seen on the PDN, which ensures your signal levels are consistent and a constant voltage is seen at the power/ground pins on an IC. We’ve compiled some important bypass and decoupling capacitor placement guidelines to help you
Is it Simultaneous Switching Noise or Crosstalk?
How can you distinguish simultaneous switching noise and crosstalk? Take a look at the difference between these two signal integrity problems in this article.
Analog Signal Bandwidth and its Relation to Power Integrity
Here’s how your analog signal bandwidth interacts with your PDN, and how it affects power integrity.
PCB Debugging: Tips, Tools, and Tricks
There are some basic testing and PCB debugging steps you should take when your new prototype has some functionality and signal integrity problems.
Using an IPC-2221 Calculator for High Voltage Design
Unsure of your conductor spacing requirements in high voltage PCBs? An IPC-2221 calculator can help. PCB design and assembly standards aren’t there to constrain your productivity. Instead, they’re there to help create uniform expectations of product designs and performance across multiple industries. With standardization comes the tools for compliance, such as calculators for certain design aspects, processes for auditing and inspection, and much
Living on the Edge (Rate) — It’s All About Time and Distance
The focus of this article is the clarify the origins of the phrase edge rate, what it really means relative to the design process and the best means for addressing it.
Optimizing Power Consumption
Power efficiency—energy efficiency if you’re a purist—has become perhaps the highest-profile aspect of system design. This is especially true for IoT applications where a device may need to operate for years on harvested energy or a cell battery. Thus, a critical stage of design is power optimization. Typically, the first stage of power optimization is setting the power budget. For example, the system spec might state that the device has to be
EMI from Heatsinks and What You Can Do About It
Selecting the right heatsink can help you keep your system cool and prevent EMI. While it may not be obvious, or while most designers may not think to check, heatsinks can generate EMI when they are connected to a switching element. This is a common problem in power supply design, and whenever a heatsink is placed in contact with a component that switches with high current draw at high frequency. Reducing EMI from heatsinks requires balancing the
Some Techniques for Suppressing DC-DC Converter EMI in IoT Products
This Li ion battery is most likely connected to a switching regulator to provide stable power. Suppressing EMI susceptibility in IoT devices from various sources is critical to ensuring your new product will work as designed. Similarly, your IoT product should limit spurious emissions if you want it to comply with EMC regulations. Among the various sources of radiated EMI from your next product, EMI within the device itself should also be
SMPS Circuit Design: Which Switching Frequency to Use?
Power supply on a network switch Power electronics and switched-mode power supply (SMPS) designers should know that working with higher switching frequencies can lead to higher switching losses in your system. However, the push to miniaturize power supplies, and the components that go into them, compels designers to work with higher switching frequencies in their SMPS circuit designs. This then creates problems where switching losses and noise
Radiated EMI Sources in High Speed/High Frequency PCBs
Radiated EMI measurements during EMC testing The image above shows a snapshot of results from an EMC test under CISPR requirements (U.S. uses FCC certification requirements). This product is right at the edge of Class B limits on radiated emissions. We can see a very complicated resonance spectrum in this plot with a large number of sharp peaks superimposed on wide peaks at lower level. What causes all of this radiated noise? There a number of
PDN Impedance Analysis and Modeling: From Schematic to Layout
Power integrity affects many performance aspects in PCBs, and ensuring power integrity in a digital design starts by ensuring the PCB layout has low PDN impedance. There are several basic aspects of PDN impedance and some basic design steps that help a designer reach relatively low impedance in a PCB. Without low impedance, power glitches can cause components in a board to operate incorrectly due to large voltage swings on the power rail. In the
Length Matching for High-speed Signals: Trombone, Accordion, and Sawtooth Tuning
Length matching for high-speed signals is all about synchronization... Once upon a time, length matching for high-speed signals required a designer with enough skill to remain productive when manually applying different trace length turning schemes. Now, with the advanced interactive routing features in modern PCB design tools, designers no longer need to manually length tune every trace in their layout. The remaining choice for a designer is
Never Cross a Ground Plane Gap in High Speed PCB Design
Make sure none of these traces crosses a ground plane gap I often browse electronics and PCB forums, and I see the same question asked over and over: Why shouldn’t I route a trace over a split in my ground plane? This question gets asked by everyone from makers to professional designers who are just dipping their toes into high speed PCB design. For the professional signal integrity engineer, the answer should be obvious. Whether you’re a long
The Role of a Decoupling, Inductance, and Resistance in a PDN
Some designers might overlook the role of a decoupling, inductance, and resistance when designing their power distribution network.
What Size Decoupling Capacitor Should You Use For Digital ICs?
Are these capacitors sized properly? Something that comes up repeatedly in PCB design guidelines, including high speed digital design "gurus", is the need to properly size decoupling capacitors. This is sometimes addressed without a full understanding of what these caps are supposed to do in a PDN or their role in ensuring power integrity. I've also seen many application notes that default to the decades-old guideline of placing three decoupling
Embedded System Power Supply Guidelines for Power Integrity
This system will require its own power supply and regulation Embedded systems that require a significant amount of processing power and that need to interface with analog components require important embedded system power supply guidelines in order to ensure power and signal integrity. Whether you design your own external power supply, or embed a power supply directly alongside your board, you’ll need to follow some important power integrity