ADC Sampling Rate and Layout for Mixed Signal Boards

Zachariah Peterson
|  Created: April 28, 2020  |  Updated: February 4, 2023
ADC Sampling Rate and Layout for Mixed Signal Boards

Whenever you’re selecting an ADC, whether it is built into an MCU or as an external component, the sampling rate you will use is a prime consideration as it will determine how well you can reproduce a measured signal. Some RF applications, analog sensor boards, and other mixed-signal devices need at least one ADC with an appropriately chosen ADC sampling rate.

If you’re designing with a mixed-signal board, you’ll need to balance the required signal bandwidth with sampling rate and your ADC’s analog input bandwidth. The last point is seldom considered when working with harmonic frequencies, but it becomes quite important if you need to detect pulse streams, a broad range of harmonic frequencies, or any other wide bandwidth signal. If you select an ADC with the wrong sampling rate, you’ll end up in a situation where aliasing creates false signal artifacts and additional noise in the input signal spectrum.

Follow Nyquist to Prevent Aliasing

The Nyquist theorem provides a simple statement regarding the sampling rate required to accurately reproduce a particular analog signal. In simple terms:

  • A periodic (repeating) waveform must be sampled at least more than double the highest frequency component of the signal.
  • The Nyquist rate is equal to this minimum sampling rate.

 

Above the Nyquist rate, all higher frequency components will be aliased and will contribute noise lower in the reproduced signal's power spectrum. If we consider the highest frequency component to be the bandwidth limit of the signal, then our sampling rate simply needs to be at least double this. In practice the sampling rate should be at least 2.5x the signal bandwdith due to the real band-limited response of ADCs (see below) as this will compensate for the natural roll-off in an ADC's input channel.

As we'll see below, there are three bandwidths you have to work with when choosing a sampling rate for an ADC:

  1. The signal bandwidth
  2. The ADC's input bandwidth
  3. The band limit on any input filter

The signal bandwidth can be controlled (or limited) using a filter, while the ADC's input bandwidth depends on its input capacitance and how the device operates.

An ADC's Input Bandwidth

The ADC itself will also have some finite bandwidth, just like any other analog component and their signals, so an ADC will never produce a digital signal which, when interpolated, gives a distortionless output up to the signal's bandwidth limit. Just like a filter or amplifier, the analog bandwidth (or full-power bandwidth, FPBW) defines a -3 dB point, beyond which there is some roll-off in the ADC's input response. The main factor that determines ADC input bandwidth are the input capacitance and input resistance (RC circuit configuration).

Depending on the clock frequency (sampling rate) and the capabilities of an ADC, an ADC’s bandwidth is could be less than the signal bandwidth. The resulting sampling and conversion action could yield a converted waveform that is attenuated when compared to the real waveform being sampled. Three different types of responses and the resulting attenuation are shown below, with the red area corresponding to the range of frequencies that will be aliased by the ADCs.

ADC sampling rate and frequency response curves
Ideal, maximally-flat, and Gaussian ADC input frequency response curves in an ADC.

The red curve shows the desired ADC input response, which cuts off the input signal exactly some limit (labeled f0 in the graph). This behavior is impossible to reproduce physically and is only the ideal behavior of these circuits. In this case, we could just set the sampling rate to double this ideal value (fS in the above graph).

The real behavior of most ADCs is Gaussian or Gaussian-like, as shown in the green curve. This means there is some rolloff in the ADC's input for higher frequency components. The behavior we typically model in an ADC for simplicity is the blue curve, and this is a practical design goal known as the maximally flat response. Given a sample rate (fS), then the maximum frequency we should sample would be equal to fS/2.5. Just to be conservative you should limit your input bandwidth lower than this.

If we look at the above graph, there are two points to understand when choosing an ADC for your mixed-signal board:

  • Signal distortion already occurs before the aliasing frequency. This can be seen in the Gaussian and maximally-flat frequency responses for an ADC. Simply increasing the sampling frequency will not prevent this problem.
  • Using a lower sampling frequency reduces cost, but it increases the chances that high frequency components create greater error between the digitized signal and the input analog signal. Anyone that has seen a ghost trace, glitches, or artificial modulation on an oscilloscope trace is familiar with these artifacts in signal reproduction.

Oversampling With a Filter: Use Your ADC Sampling Rate to Reduce PCB Noise

This gets back to the original question: what is the best sampling rate? The answer is…it depends! One strategy to reduce noise is to oversample the signal, meaning to use a much higher sample rate than you need.

If your mixed-signal board has excessive broadband noise on an analog signal, you can use a higher sampling rate to reduce this noise. A good rule of thumb when sampling a wide bandwidth analog signal is to set the sampling rate anywhere from 2 to 5 times the bandwidth limit of your signal. If the signal is a narrowband signal or a sine wave, use the signal's carrier frequency to set the sample rate with the same rule of thumb.

By oversampling the signal, the total noise power carried in that signal will be spread out over a broader bandwidth (up to higher frequencies) because the limit where aliasing begins occurs at a higher frequency. If the signal is then also filtered at a lower bandwidth near the band edge, this cuts off the higher frequency signals that would have created additional noise in the sampled signal. The simplest anti-aliasing filter is an RC circuit, although technically any low-pass filter on the input of an ADC will provide anti-aliasing.

ADC anti-aliasing filter
This low-pass RC filter is the simplest anti-aliasing filter for an ADC.

If the sampling rate and ADC input bandwidth are known, and you want to further limit noise on the input signal, then you need to use an input filter. There are multiple filter options that can be used; a first-order RC filter (shown above) is probably the simplest. Other filters like a Butterworth filter can be used to approach the ideal response as long as passband ripple is not extreme, or an LC bandpass filter could be used as long as the filter does not destabilize the ADC input.

So which R and C values should be used in the above filter? It depends on the parameters in the ADC input stage, signal acquisition time, and the number of bits in the ADC. First, the input stage would can be modeled similar to what is shown below; this applies to SAR ADCs, multiplexed ADCs, switched capacitor ADCs, and delta-sigma ADCs. The bandwidth of the input filter can be calculated in the standard way for cascaded RC circuits, while there is another relation relating to the acquisition time as shown below.

ADC input filter

The above case applies almost exactly in SAR ADCs when C >> C(in) and R >> R(in). Other types of ADCs, like switched capacitor ADCs, could have large R(in) values and these would need to be included in the acquisition time calculation.

Noise Reduction in an ADC Layout at High Sample Rates

To learn more about ADC usage in a PCB layout, watch the playlist below. There are four videos in this playlist covering ADC usage in a PCB, and providing a project tutorial for a dual ADC module that includes an isolated ADC. Other topics discussed include wiring of an ADC to its reference and power rails, as well as selection of a reference voltage for the analog subsystem when a reference pin is included in the ADC component package.

 

After choosing an ADC with the desired sampling rate, you’ll have to think about your layout strategy. Perhaps the fundamental layout rule with ADCs in mixed-signal boards is to have the ADC straddle the digital and analog regions of the ground plane to ensure these different types of signals remain separated. Like other components with digital output, the digital interface on an ADC is susceptible to ground bounce, so be sure to use enough capacitance to suppress this noise source and provide accurate signal reproduction. Ground this bypass capacitor to the same plane as the ADC’s ground plane to provide the lowest possible loop inductance.

The other points to consider in ADC usage in a PCB include routing to reduce crosstalk, and routing any external clock to ensure low noise by placing the clock source near the ADC input pin. Finally, grounding is probably the biggest determinant of noise in lower level analog systems, so use a single ground net in almost all cases.

Once you’ve determined the appropriate ADC sampling rate for your system, you can identify the components you need and layout your board in Altium Designer®. The Manufacturer Part Search panel in Altium Designer gives you access to verified component libraries, complete with accurate footprints, symbols, and 3D models. You’ll also have access to a set of post-layout simulation tools for analyzing the behavior of your mixed-signal PCB.

Now you can download a free trial of Altium Designer and learn more about the industry’s best layout, simulation, and production planning tools. Talk to an Altium expert today to learn more.

About Author

About Author

Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2500+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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