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    How to Use Testpoints on a PCB Design in Altium Designer

    Altium Designer
    |  May 4, 2018

    Thin line vector with several symbols

    Maybe it’s because of the old memories of pop quizzes in grade school, but it seems like no one really likes the idea of “testing”. Just as the school children in “A Christmas Story” reacted badly to having to write a theme, people all over the world usually react just as negatively to the idea of taking a test.

    And yet, if you are going to be a circuit board , you are going to have to learn how to use test points on a PCB. The good news is that working with testpoints is not difficult and can even be kind of fun. Here’s how to use test points on a Printed Circuit Board.

    Step 1: Refresh Yourself on testpoints

    There are two different types of testing that require testing points on a circuit board, bench testing by a technician and automated testing during manufacturing. We will be talking about the latter here and there are two types of automated tests that use test points, bare-board testing for fabrication and in-circuit testing (ICT) for assembly.

    The bare-board testing is done prior to assembly and it is to make sure that you have good electrical connectivity between all the nodes. The ICT is a more functional test after assembly to make sure that the components are working as they should. In both cases, probes from a test fixture will come into contact with the testpoints on the circuit board in order to conduct the tests.

    We are not going to be looking at how to determine the design rules of testpoints such as their size, spacing, and clearance requirements. Those rules will vary depending on the needs of your company and your board manufacturers. Instead, we will focus on assigning testpoints in your circuit board using Altium Designer® and how to set up the test point design rules that you are using.

    Step 2: Assign a Test Point Manually

    The general rule of testpoints on a printed circuit board is that each net needs to have a probeable point to test. These “testpoints” need to be known and cataloged in the Printed Circuit Board design system for reports to be generated that the manufacturer will use when testing the finished boards. To do this you will create testpoints on the board by flagging pads or vias as probeable points. Altium has capabilities to do this both manually and automatically.

    To flag a pad or a via as a testpoint manually, you simply need to select that pad or via and edit its properties. Altium will allow you to set it as a Fabrication (bare-board) testpoint, an Assembly (ICT) testpoint, or both.

    Altium also allows you set up design rules for testpoints, which we’ll cover later, but setting the testpoint manually will override any current rules. In the picture below, you can see the properties setup for a thru-hole pad where we have scrolled to the bottom and enabled both the fabrication and assembly testpoint options for the top and the bottom of the board.

    Screenshot of AD18 pin property menu

    Manually setting a thru-hole pin as a testpoint in Altium

    In the picture above, you can also see labels for this pin designating it as a testpoint. This is not a default visual setting and therefore must be enabled. To do this, go to View Configuration panel and click on the “View Options” tab. You will see the Testpoints display settings when you scroll to the bottom of the tab.

    Step 3: Test Point Design Rules

    You can set up design rules in Altium for governing the size, spacing, and clearance requirements of the pads and vias to be used as testpoints. These setups are in the “PCB Design Rules and Constraints” menu, which can be accessed from the Design > Rules pulldown menu. On the left side of the menu, you will find the “Testpoint” constraints as shown in the picture below.

    Screenshot of AD18 testpoint rules menu

    The testpoint rules menu

    Altium will come with some preset testpoint rules. You can also add additional testpoint rule sets as needed. As you can see in the picture above, there are four separate rules in the default testpoint design rule set:

    • Fabrication Testpoint Style
    • Fabrication Testpoint Usage
    • Assembly Testpoint Style
    • Assembly Testpoint Usage

    In the picture below, you can see the menu setup for the testpoint usage rule. The dropdown menu allows you to choose which nets are eligible for testpoints. You can set the rule for all nets, or specify nets by name, class, or layer. Additionally, you can specify how many testpoints per net to use, or even prohibit some nets from getting testpoints altogether.

    Screenshot of AD18 testpoint usage rules menu

    Setting the testpoint usages in Altium

    The testpoint style menu allows you to modify the settings that are used to determine which pads and vias are eligible for testpoints. If a specific size of via is desired for your testpoints for instance, you can set the style rules to only allow that specific size of via to be used. Here are some of the settings that you can work with:

    • Size: You can set the minimum and maximum size as well as setting a preferred size for pads and vias as well as their drilled hole sizes.
    • Grid: If you want testpoints to be set on pads and vias that are on a specific grid, you can specify that here.
    • Allowed Side: Here you can specify that testpoints will be placed on the top, bottom, or both sides.
    • Scope: This will allow you to limit testpoints to SMD Pads, Thru-hole Pads, Vias, or any combination of the three.
    • Clearances: This will allow you to set up clearances between testpoints and to other components on the board as well.

    In the picture below, we are going to set up the testpoint style for the little test board that we are working with. Note that we are setting this up to only allow testpoints on the bottom side. Since our little test board doesn’t have any components placed on the bottom nor does it have any vias, only the thru-hole pins will be available for testing.

    Screenshot of AD18 testpoint style rules menu

    Setting the testpoint styles in Altium

    Step 4: How to Use Testpoints on a PCB Design with the Testpoint Manager

    Now that we have set up the design rules for the testpoints, we can use the testpoint manager to batch create our testpoints. In the picture below you can see the “Testpoint Manager” menu which is found in Tools > Testpoint Manager.

    Screenshot of AD18 testpoint manager menu

    The Testpoint Manager menu

    You can see above that the testpoint manager contains a list of nets on the board along with the testpoint status of each net. Currently, every net is listed as “Incomplete” for both the Fabrication and Assembly testpoints because the testpoints haven’t been assigned yet. In the middle of the menu are buttons for assigning the fabrication or the assembly testpoints.

    These buttons open a dropdown menu with the assignment options. At the bottom of the menu, you have a summary of the testpoint status which is correctly reporting that 6 nets are missing their assignments. On our little test board, we went ahead and assigned the Assembly Testpoints by opening the dropdown menu and selecting “Assign All”. You can see the results in the picture below.

    Screenshot of AD18 testpoint manager menu with assignment failures

    The Testpoint Manager menu after the testpoints failed to assign

    As you can see, none of the testpoints were assigned. The Testpoint Manager has given us a possible cause for these failures in the Assignment Results window, but that is a general message and doesn’t apply in this instance. The real problem, as it turns out, is that our testpoint style rules do not match our design and the Testpoint Manager failed all the assignments exactly as it should.

    To correct this problem, we will make a couple of changes to the testpoint style rules as you can see in the picture below.

    First of all, the thru-hole pads in our design are placed on a .01 mm grid while the testpoint grid was set to a .025 grid. Because of this, the testpoint style rules were not permitting the assignment of any testpoints because they didn’t fall on the correct grid. The next problem is that the rules specified a hole size no larger than 1.016 mm, but we have a hole size that is 1.02 mm.

    Screenshot of AD18 testpoint style rules menu with corrections

    Changing some of the testpoint styles

    We corrected these problems by disabling the grid and setting the maximum hole size to 1.03 mm as you can see in the picture above. Once the rules were updated we went back to the Testpoint Manager and re-ran the assignments. As you can see in the picture below, all of our nets have now been correctly assigned with assembly testpoints.

    Screenshot of AD18 testpoint manager menu with assignment successes

    The Testpoint Manager menu now that the testpoints have successfully assigned

    Assigning testpoints is a critical part of the PCB ’s job, and you need a set of design tools that you can depend on. Fortunately, Altium is the kind of PCB design software that comes equipped with powerful and easy to use capabilities for defining and managing testpoints.

    Would you like to find out more about how Altium can help you when it comes time to create the testpoints on your next PCB design? Talk to an expert at Altium.

    About Author

    About Author

    PCB Design Tools for Electronics Design and DFM. Information for EDA Leaders.

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