The PCB Fabrication Process—What Every Design Engineer Needs To Know, Part 2

Kella Knack
|  Created: April 7, 2020  |  Updated: January 4, 2021
The PCB Fabrication Process—what Every Design Engineer Needs To Know, Part 2

In Part 1 of this article, I described the first steps that occur during the PCB fabrication process. They detailed the inner layer processing effort as well as the efforts that take place during the transition from inner layer processing to lamination. This part of the article will provide a detailed description of the lamination, drilling and plating processes.

The goal of these two articles is to familiarize designers and design engineers enough with what happens during PCB manufacturing so that they have a working understanding of the various steps of the fabrication process. This, in turn, will enable them to provide the correct information needed by the fabricator to ensure that the board they have designed will be the board that comes out of the manufacturing cycle.

PCB Lamination Process

Lamination is the point in the PCB fabrication process where all of the inner layers, prepreg and foil are assembled into a stack that is pressed and heated to create the final multilayer PCB.

Note: To review, prepreg is the fiberglass cloth that has been saturated with resin that is not finally cured. The resin in the prepreg will melt during the PCB lamination process and serve as the “glue” that bonds all the layers to one another. This resin is the same used in the laminate (sometimes, prepreg is referred to as ‘B stage’). After lamination, the prepreg and laminate look the same since they are both the same resin system.

There are two ways to laminate a PCB. They include:

  • Foil lamination
  • Cap lamination

Both of the foregoing are described in detail below.

Foil lamination is depicted in Figure 1. This stackup includes:

  • The pairs of inner layers or details; these layers are formed back-to-back on pieces of laminate
  • The layers of the aforementioned prepreg or “glue layers”
  • The continuous sheets of copper foil that form the two outside layers
Stackup for 6-layer PCB
Figure 1. Foil Lamination of a 6-Layer PCB

Foil lamination involves processing one less detail (pair of layers on a piece of laminate) than that done with cap lamination. As a result, the finished PCB will cost less. Thus, foil lamination dominates the multilayer PCB industry.

Cap lamination differs from foil lamination such that the two outer layers are formed on a piece of laminate with an inner layer on the opposite side. Therefore, for Figure 1 with cap lamination, there would be three pieces of laminate in contrast to the two that are used in foil lamination. Cap lamination is used when blind vias pass between layers 1 and 2 of a PCB and laser or controlled-depth drilling is not available to form them. Cap lamination is also used when a speciality laminate, such as Rogers 4350, is needed between layers 1 and 2. Figure 2 depicts cap lamination.
The three components that comprise the lamination process include:

  • Layup.
  • Lamination.
  • Cool down. 
6-layer entering lamination
Figure 2. Cap Lamination of a 6-Layer PCB

Layup: Figure 3 depicts a typical layup station. Alignment pins have been pressed at precise locations into the thick steel plate at the bottom of the station. These pins match the holes that have been punched into the laminate at the end of the inner layer processing cycle (described in Part 1 of this article). The person doing the layup places a separation sheet that is larger than the panel on the bottom of the layup station. On top of this, a piece of copper foil is placed followed by a sheet or two of prepreg. An inner layer pair or detail is then added followed by more prepreg until all of the inner layers have been stacked on top of each other. Prepreg is then added followed by a sheet of foil that will serve as the second outer or top layer. 

PCB Fabrication Layup Station
Figure 3. A Typical PCB Fabrication Layup Station

Several PCBs can be stacked on a single base plate to maximize the efficiency of the press. A separator is placed between each PCB but it’s important that it be something solid such as a sheet of stainless steel. If the separator is flexible and the PCB placed on top of it has many layers, it’s possible that the surface of the PCB will be deformed when the resin in the prepreg melts. This results in the PCB having variations in thickness. If this occurs across the span of a large BCA, soldering operations may become difficult. In addition, if there is high operating stress, the life of the BGA itself can be shortened.

After all the PCBs have been loaded onto the alignment pins of the bottom plate, a top plate is added. The combination of the laminate, foil and prepreg is referred to as a “book”.

Lamination starts when the book is placed into an opening in the lamination press such as the one depicted in Figure 4. 

Lamination press
Figure 4. A PCB Lamination Press

The books are inside frames that allow for a vacuum to be drawn. This removes any air that might be trapped inside the PCB which would cause a void. Next, pressure is applied followed by heat. The heat melts the resin in the prepreg so that it can flow into the voids in the adjacent copper layers. The temperature is then further increased to cure the resin in the prepreg. The resin in the laminate is already cured so it doesn’t melt and, at this point, there is no detectable difference between the resin in the laminate and the resin in the prepreg. They are both cured and solid.

Once the press cycle has been completed, the collection of PCBs will be hot, and the resin will be flexible. If the PCBs are removed while they are still hot, they may warp. In order to prevent this, the PCBs need to be cooled down in a controlled manner. This cool down is usually done in a specially designed press such as that depicted in Figure 5. 

Lamination cool down press
Figure 5. A Lamination Cool Down Press

Once the cool down cycle has been completed, the laminated PCBs are ready for drilling and plating.

Drilling and Plating

Following the lamination process, a PCB is a panel with blank, solid copper on the outer sides. The solid copper foil provides a conducting path for the plating currents that will deposit the copper in the holes and on the surface features. Leaving the two outer layers, aka “sides”, unetched provides this current path.

At this stage in the process, both through hole and blind vias are drilled. Note: For more information regarding through hole, blind, and buried vias, see my previous blog.

through hole rill and laser drill
Figure 6. Through Hole and Laser Drills

This is a safety precaution as the laser drill can cause eye injuries if not carefully operated. Figures 7 and 8 are typical drill machines shown in their separate rooms.

through-hole drilling machine
Figure 7. A Through-Hole Drill Machine

 

laser drill 
Figure 8. A Laser Drill for Blind Vias

Many fabricators use the lamination alignment holes described above to center a panel on the drill machine. The problem with this approach is that some of the resin is squeezed into the area surrounding the lamination pins during the lamination cycle. A further reason for not doing this is that laminate shrinks slightly during lamination. Fabricators with good process engineering practices know to allow for this as the film is plotted but even this is not enough to account for the shrinkage that is not quite uniform across each sheet of laminate. As a result, accurate alignment of the drill to the patterns inside the PCB is slightly off. When a PCB design requires true drill positioning within +5 mils (+ 127 microns), this will not be accurate enough on a “18 x 24” (54.8 cm x 73.1 cm) panel. In these cases, drill alignment patterns are etched in each corner of each inner layer in the same location. Following lamination, an x-ray machine is used to locate these targets inside the PCB. The targets will not lie precisely on top of each other. An optimization program examines how far out of alignment each target is, and calculates an average location for all of them. The result is a set of four calculated targets in the four corners of the panel that reflect the actual size of the images inside the PCB. Based on this information, a new set of drill alignment holes is precisely drilled in the perimeter of the panel. The drill file for the board is then corrected to match this new size on each individual panel.

Following the completion of the drill alignment, the panel is placed on a drill machine and all the through holes are drilled, plated or not. In most instances, this operation is preceded by drilling the blind vias on the laser drill machine.

Note: As noted in my earlier referenced article on the different types of vias, it is possible to drill blind vias with a mechanical drill using a process known as controlled-depth drilling.

If the non-plated holes are drilled at this step, they will have to be plugged or tented during the plating operation to prevent copper being plated in them. An alternative approach is to drill the non-plated holes after the plating phase has been completed. The method chosen is dependent on how a fabricator has organized its operation.

When it comes to plating copper on the outer layers, a series of complex operations is required. The primary mission of outer layer plating is to deposit copper into the drilled holes to provide electrical paths between the surface and inner layers of the PCB. If it were not for the need to connect to the inner layers, copper plating would not be needed. In fact, single-sided PCBs do not require any plating.
Figure 9 is a diagram of the basic plating and outer layer processing steps. Drilling leaves debris in the holes as well as burrs in the outer copper layer. The next step is to remove these burrs and debris. This can be done by plasma etching or chemical etching. The choice of which process to utilized is dependent on the laminate being used. 

Plating Process Steps for Outer Layers
Figure 9. Outer Layer Plating Process Steps

Plasma etching is done by placing the PCBs in a chamber with a mixture of gases that are ionized into a plasma with an RF field. The plasma removes the burrs and debris. Following cleaning and deburring, the plating operation can begin. The problem with this approach is the holes are drilling through resin and glass that is not conductive so it is not possible to do electroplating. This problem is solved by using an electroless process to deposit a thin film of copper on the plastic surface in each hole. Figures 10 and 11 depict a typical electroless copper processing line. Figure 10 is the schematic representation of this process. All the steps in the process are shown in this schematic. Figure 11 is the photo of an operating line.

typical electroless plating line
Figure 10. Schematic of a Typical Electroless Plating Line

 

electroless copper plating line
Figure 11. A Typical Electroless Copper Plating Line

The question arises as to why not keep depositing electroless copper until the full copper thickness is achieved. This approach has been tried many times without success. The problem is that electroless copper is brittle and cannot withstand the thermal shock of soldering and rework. So, electroless copper is used as the scaffold onto which electrolytic copper is plated. Electrolytic copper is ductile enough to tolerate the thermal stresses of soldering. Years back, there was a process called Multiwire that was used for making prototype PCBs. This process used electroless copper to form the plating in the drilled holes and it was subject to severe reliability problems before it was finally discontinued.
Once the electroless copper has been deposited in the holes and over both sides of the entire panel, it is possible to move directly into electrolytic copper plating. Here, the holes and both sides of the of the PCB are coated with copper. This process is called panel plating and it was the process of choice before fine pitch SMT components came on the scene.

With the advent of fine pitch SMT components, etching down through the plated copper and the underlying foil copper to create the final outer layer conductor patterns resulted in unacceptable width variations of the surface mount pads. The process depicted in Figure 9 was devised to solve this problem and it is called pattern plating.

Pattern plating is accomplished by applying a plating resist over the entire surface of the PCB. This plating resist is photosensitive much like the etch resist that is used to create the inner layers. The panel is placed in a photo imaging machine such as that shown in Figure 12. The areas where the copper is to be plated are exposed by washing away the plating resist. The area that is to be free of copper is left covered with plating resist.

electrolytic plating line
Figure 13. Schematic of Electrolytic Plating Line
Electrolytic copper plating line
Figure 14. Typical Electrolytic Copper Plating Line

A common problem with pattern plating is, across the surface of the panel, there is a lack of uniform distribution of the copper. This is due to the variation of component features across the surface of the board. Where there are few features to be plated, the plating current will be dense and, as a result, the plated copper will be much thicker than those areas where there are many features such as a BGA pattern or a high-pin count connector. The primary issue is the variation in finished hole sizes. This is a big concern when press fit connectors are part of the assembly. To address this, a pattern of dummy pads can be added in areas where there are few features. This is referred to as “thieving” because it robs plating current from the other features in the area. The objective is to make sure the plating current is even across the panel so that the plated copper has a uniform thickness. Figure 15 shows a PCB with thieving that has been added to outer layers.

thieving dots used for uniform plating
Figure 15. A PCB with “Thieving” Dots Added for Uniform Plating

If thieving is added to the outer layers of a PCB and there are controlled impedance traces in the next layer down, layer 2 or n-1, it’s important that thieving is not placed over those traces. If there is thieving over these traces, it must be accounted for in the trace design notes identifying where thieving is possible and where it is not.

Normally, copper plating is done with a continuous DC current. This causes problems with high aspect ratio holes. In these holes, which are very narrow compared to their length or height, it’s important the plating be the same thickness along the entire length of the hole. Copper tends to plate much thicker near the ends of such holes which results in a “dog bone” shape to the copper, with the copper being thinner in the center of the hole and thicker at the ends of the hole. A solution to this problem is RRP (reverse pulse plating). Here, the copper is first plated onto the panel for a brief time in a current pulse.

Next, the current is reversed for a smaller interval which unplates some of the copper. The copper at the corners of the holes unplates faster than at the deep portion of the hole. When this process is done correctly, the result is a hole with a uniform thickness of copper along its entire length.

This completes the basic plating process. In a follow-on article, to complete the fabrication process, I will provide an overview of the outer layer processing operations.

Summary

Along with front-end engineering and inner layer processing, drill and plating operations are comprised of multiple, sometimes complex steps that require close attention to detail. Design engineers who have a good understanding of these operations will be able to provide complete design information that will result in the satisfactory fabrication of reliable PCBs.

Would you like to find out more about how Altium can help you with your next PCB design? Talk to an expert at Altium or continue your education by reading more on getting your layer stack right.

Reference

  1. Ritchey, Lee W. and Zasio, John J., “Right The First Time, A Practical Handbook on High Speed PCB and System Design Volume 2.”

About Author

About Author

Kella Knack is Vice President of Marketing for Speeding Edge, a company engaged in training, consulting and publishing on high speed design topics such as signal integrity analysis, PCB Design ad EMI control. Previously, she served as a marketing consultant for a broad spectrum of high-tech companies ranging from start-ups to multibillion dollar corporations. She also served as editor for various electronic trade publications covering the PCB, networking and EDA market sectors.

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