The PCB Fabrication Process—What Every Design Engineer Needs To Know, Part 1

Kella Knack
|  Created: April 7, 2020  |  Updated: April 21, 2020
The PCB Fabrication Process—What Every Design Engineer Needs To Know, Part 1

In the olden and not-so-olden days of PCB development, the process of moving a board from design to manufacturing was often referred to as “throwing the design over the wall.” This was not the result of the operations being so clearly divided, but rather a way to assign ownership and blame if there were errors. My last project at Martin Marietta was a black hole program for the U.S. Airforce and Navy. When problems were encountered during the front-end engineering process, the design engineers would say that the errors were introduced during that process. Conversely, those doing the front-end engineering process would say that any problems they discovered were the fault of the design team.

This type of ping-pong blame game threatened to go on ad infinitum, creating numerous scheduling issues and interrupting the entire project flow.

One of the reasons for the confusion was that very few of the design engineers clearly understood the PCB fabrication process. Unfortunately, that problem continues today. There are still a number of designers—perhaps most of them—who have never toured a PCB fabrication facility. They are also unaware of the various steps that occur during the fabrication process. The purpose of this article is to describe those steps and what transpires in each of them. Part 1 of this article focuses on inner layer processing and the steps that are done prior the lamination process. Part 2 will transition from lamination to the drilling and plating processes.

Inner Layer Processing

In the broadest view, inner layer processing is the part of the PCB fabrication process in which all the inner layers, including both signal and power layers, are created. It begins with pieces of laminate that have a copper foil bonded to each side. This foil, on each side, may be the same thickness or have different thicknesses. Within the industry, these pieces of laminate are often referred to as ‘details’. The specific steps of inner layer processing are detailed below. Note: the terms “photo resist” and “etch resist” are used interchangeably within the industry.

  • Cleaning the inner layer copper to allow the photo resist to adhere to it.
  • Applying the photo resist.
  • Exposing the photo resist on each side to the image desired.
  • Developing the photo resist.
  • Etching away the unwanted copper.
  • Removing the photo resist.
  • Optically inspecting the copper patterns.
  • Roughening the copper surfaces to promote adhesion during lamination.
  • Punching the registration holes.

When it comes to cleaning the copper foil on the laminate, it can be done in one of two ways. One approach is to pass the sheet of laminate through a series of brushes that have very fine particles of pumice as the abrasive. The second way is to wash the copper foil in a chemical bath that etches away a small amount of the copper (typically less than one tenth of a mil or 2.5 microns). The disadvantage of the pumice scrub is that it puts micro scratches into the surface of the copper. In thin copper, ½ ounce or less, these scratches can lead to trace opens. Because of this, pumice scrub should not be used on copper foils that are thinner than one ounce or 1.4 mils thick (36 microns). In fact, pumice scrub has been eliminated at fabricators that specialize in thin copper foils.

Note: Copper foil thickness is specified in ounces per square foot. This is a hold-over from the gold leaf manufacturing process. Basically, it means taking an ounce of metal and spreading it over one square foot. Hence, one-ounce copper spread out in this manner is 1.4 mils, or 36 microns thick. ½ ounce copper is 0.7 mils or 18 microns thick.

Once the two sides of the laminate have been cleaned, the photo resist is applied. This is most often done with a roll laminator such as that depicted in Figure 1. 

Roll Laminator
Figure 1. A Roll Laminator Used to Apply Photoresist

There is a roll of photo resist for each side of the laminate. This resist is made up of two layers. One is the photo resist itself while the other is a carrier film that protects the resist during handling.

After the resist has been applied, the laminate is placed in an exposure chamber that exposes the resist to the image that will be etched on side of the laminate. Figure 2 shows a typical film exposure machine.

photoresist exposure station
Figure 2. Photoresist Exposure Station

The exposure part of the machine consists of two plates that are hinged together along the back. A piece of film is mounted to the top piece of the glass and another is mounted to the bottom piece of the glass. The laminate is placed between these two plates and they are closed putting the layers in contact with them. For this operation, it is essential that the big contact printer be very clean.

Next, the assembly (detail) is inserted into the exposure unit, which exposes the photo resist to a collimated light source so that the copper pattern is imprinted into it. Once the exposing process has been completed, the outer layer of protective film is removed from each side of the panel and processed through a set of operations called DES (develop-etch-strip). Figure 3 depicts the DES line that is used in a typical fabrication shop. 

etch strip line
Figure 3. Develop-Etch Strip Line

This is a horizontal etching operation which means that the piece of laminate goes through the process laying flat with the etchant being sprayed by nozzles onto each side. It’s a complex balancing act to ensure that the correct amount of etchant is sprayed on each side so that enough copper is removed without over-etching. Because the etchant on each side is sprayed separately, it is possible to etch two different thicknesses of copper on the same piece of laminate.

Because two thicknesses of copper can be etched onto the same piece of laminate, some encourage design engineers to use different thicknesses of copper for the signal and the power layers. Both sides are etched at the same time and the etching time is biased so that the thicker side is completely etched.
This approach over etches the features of the thinner side of copper, so two things happen. First, the film used to image each trace width is modified so that the width of the trace in the film is wider than the finished trace width. This means that the gap between two adjacent traces in the working film will be smaller than that in the finished PCB. This is the space which the etchant must pass through in order to etch away the copper between two traces. As a result, the minimum trace spacing in the original artwork must compensate for this. Thicker copper layers require more space to allow for etching. This is one reason that fine lines and fine spaces are built on very thin copper. Second, the time and concentration of chemicals required to etch through the side of the laminate that has the thick copper is likely to lead to over etching of the copper on the thin side. This makes it very difficult to accurately maintain the feature geometry. In our experience, trace width control is not adequate for controlled impedance PCBs.

As a result of the foregoing, we advise using the same thickness of copper on both sides of a piece of laminate. Figure 4 shows a piece of inner-layer laminate emerging from the DES process.

inner layer pair after etching
Figure 4. An Inner Layer Pair After Etching

Note the image of the inner layer in the center of the panel and the manufacturer’s tooling around the edges. As can be seen in Figure 3, there are many steps in the DES process. All of them must be closely monitored to ensure that the etching is uniform. As we tour new fabricators, we pay special attention to how well the chemistry in the process is monitored as well as how the pieces of laminate are handled in order to avoid damage.

Well maintained inner etching lines can etch traces with an accuracy of +0.5 mils in ½ ounce copper and +1.0 mils in one-ounce copper.

The Final Steps of Inner Layer Processing

Once the pieces of laminate have been etched and the etch resist has been removed, there are three more operations (referenced in the bullets above) that are required before the inner layers are ready to be laminated. They include:

  • Automatic optical inspection (AOI).
  • Panel routing.
  • Registration hole punching.
  • Copper roughening.

AOI involves scanning the copper pattern on each side of the detail to ensure there are no defects such as shorts, opens or stray bits of copper left behind. Figure 5 shows a typical AOI station. 

AOI Station
Figure 5. A Typical Automatic Optical Inspection (AOI) Station

Most AOI stations scan the copper pattern and compare it to the Gerber or film file that has been used to etch that layer. This ensures that not only are there no random particles on the layer but also that the image exactly matches the design artwork.

Punching the registration holes in the laminate (also referred to as post-etch punching) allows the layers to be aligned with each other during the lay-up and lamination process. Some fabricators punch these alignment holes in the pieces of the laminate prior to the photo imaging step and then use these holes to align the piece of laminate to the film during imaging. It was eventually discovered that these holes were not necessary for this imaging step. Now, instead, targets are placed on the film in precise locations. These targets determine exactly where the copper image is. The piece of laminate is placed in a special piece of equipment called a post-etch punch which locates these etched targets and aligns the piece of laminate under a set of precisely placed punches which punch the alignment holes around the perimeter of the panel. This approach yields a much more precise alignment of the image to the tooling holes and is needed to hold the tight tolerances characteristic of high-density, high-layer count PCBs.
Note: In the panel shown in Figure 5, there are no alignment holes in the periphery of the panel.

The final inner-layer processing step involves roughening the copper surfaces so that they will adhere tightly to the resin in the prepreg system during lamination. This step is necessary because, as they emerge from the DES process, the copper surfaces are so smooth that it is difficult to create a strong bond between the laminate and the solid copper planes of the PCB. This led to the crosshatching of planes that was used in the early days of multilayer lamination. Crosshatching is done by creating small openings in the copper plane to allow the resin to bond to the laminate under the copper. This was the solution to the delamination problem that was then being experienced.

In the late 80s, two processes—one called ‘black oxide’ and the other ‘alternative oxide’—were developed in order to solve the adhesion problem so that crosshatched planes would no longer be a necessity. Both of these are chemical processes that micro-etch the copper so that it is rough enough to bond with the resin in the prepreg. Using the alternative oxide process, the copper is colored as seen in Figure 5.

Using the black oxide process, the appearance of the copper is a matte black. Figure 6 shows this on an
inner layer.

inner layer pair following black oxide application
Figure 6. An Inner Layer Pair After the Application of Black Oxide


Have more questions? Call an expert at Altium, or discover more about working with Manufacturers to develop good DFM practices with Altium Designer®.


  1. Ritchey, Lee W. and Zasio, John J., “Right The First Time, A Practical Handbook on High Speed PCB and System Design Volume 2.”

About Author

About Author

Kella Knack is Vice President of Marketing for Speeding Edge, a company engaged in training, consulting and publishing on high speed design topics such as signal integrity analysis, PCB Design ad EMI control. Previously, she served as a marketing consultant for a broad spectrum of high-tech companies ranging from start-ups to multibillion dollar corporations. She also served as editor for various electronic trade publications covering the PCB, networking and EDA market sectors.

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