Using an IPC-2221 PCB Clearance Calculator for High Voltage Design

Zachariah Peterson
|  Created: January 17, 2020  |  Updated: February 4, 2023
Using an IPC-2221 Calculator for High Voltage Design

PCB design and assembly standards aren’t there to constrain your productivity. Instead, they’re there to help create uniform expectations of product designs and performance across multiple industries. With standardization comes the tools for compliance, such as calculators for certain design aspects, processes for auditing and inspection, and much more.

In high voltage PCB design, the important generic standard for PCB design is IPC-2221. Many important design aspects are summarized in this design standard, some of which boil down to simple mathematical formulas. For high voltage PCBs, an IPC-2221 calculator can help you quickly determine appropriate spacing requirements between conductive elements on your PCB, which helps ensure your next high voltage board will remain safe at its operating voltage. When your design software includes these specifications as automated design rules, you can remain productive and avoid making layout mistakes as you build your board.

What is IPC-2221?

IPC-2221 (Revision B effective 2012) is a generally accepted industry standard that defines a multitude of PCB design aspects. Some examples include design requirements on materials (including substrates and plating), testability, thermal management and thermal reliefs, and annular rings, to name a few.

Some of the design guidelines are superseded by more specific design standards. For example, the IPC-6012 and IPC-6018 provide design specifications on rigid PCBs and high-frequency PCBs, respectively. These additional standards are meant to be largely consistent with the IPC-2221 standards for generic PCBs. However, IPC-2221 is not typically the qualification standard used to assess product reliability or manufacturing yield/defects. For rigid boards, either IPC-6012 or IPC-A-600 will normally be used for qualifying fabricated rigid PCBs.

IPC-2221B Conductor Spacing in High Voltage Design

Important design requirements for high voltage PCB design are specified in the IPC-2221B standard. One of these is conductor clearances, which is intended to address two points:

  • The possibility of corona or dielectric breakdown at high electric field strength
  • The potential for conductive anodic filamentation, sometimes called dendritic growth (see below)

The first point is most important as it can be most easily controlled by setting the right minimum clearance between conductors in the PCB. The second effect can also be suppressed with appropriate trace spacing, as well as material selection and general cleanliness in processing. The required spacing needed to prevent these effects is summarized as a function of the voltage between two conductors in the IPC-2221 standard. 

The image below shows Table 6-1 from the IPC-2221 standards. These values list minimum conductor spacing as a function of the voltage between the two conductors. These values are specified in terms of either the peak AC or DC voltage between the conductors. Note that IPC-2221 only specifies fixed minimum conductor spacing values for voltages up to 500 V. Once the voltage between two conductors exceeds 500 V, the per-volt clearance values shown in the table below are used to calculate the minimum conductor spacing. Each volt above 500 V will add to the required minimum clearance by the amount shown in the bottom row of the table.

IPC-2221 Table 6.1
IPC-2221B conductor spacing requirements.

Temperature Rise at High Current

Not all high voltage PCBs will run at high current, but those that do use high current may experience high temperature rise when conductors are not large enough. The temperature rise in a PCB occurs due to Joule heating, which is related to a conductor's DC resistance. Therefore, the cross-sectional area in conductors carrying high current should be large when the current is also large.

To determine the best cross-sectional area, calculators based on data published in IPC-2221 and IPC-2152 standards can be used. The dataset used in an IPC-2152 calculator is more complex, but it can provide more accurate results than an IPC-2221 calculator.

IPC-9592B Standard on Power Conversion Devices

The IPC-9592B standard provides conductor spacing requirements specifically for power conversion devices. These standards are quite consistent when graphed alongside the required conductor spacing specified in IPC-2221. The table below specifies the spacing requirements under IPC-9592B. This defines the minimum required trace spacing as a function of peak voltage values; the difference is that this standard scales the minimum conductor spacing values with applied voltage below the 500 V limit shown in the above table.

Minimum Spacing (mm)

Voltage Range (V)


Vpeak < 15


15 ≤ Vpeak < 30

0.1 + (0.01*Vpeak)

30 ≤ Vpeak < 100

0.6 + (0.005*Vpeak)

100 ≤ Vpeak

IPC-9592B conductor spacing requirements for power conversion devices.

If you look online, you'll find some calculators that are pre-programmed with the above values. Once you determine the appropriate spacing values, you can program these into your design rules as object-to-object clearances. Since you will generally have different nets operating at different voltages, you can also program these values into your design rules on a net-by-net basis. You'll then be able to set certain nets closer to each other if your design becomes very dense.

IPC-9592 and IPC-2221B Clearance Calculator

The calculator below provides a safe clearance calculation based on the standards cited above. To use this calculator, enter the working voltage at which your board will operate, and the calculator will return clearance requirements for internal, external, and coated traces in the PCB layout. The calculator will also return results for IPC-9592 compliant power conversion devices.



IPC-2221B Results


IPC-9592 Results



Metal Migration Failure

Metal migration is one of many failure mechanisms in high voltage designs with high conductor density. When two conductors are brought up to a high potential, electrochemical growth of metallic dendrites can occur when the conductors contain residues with water-soluble salts; an SEM image of dendritic growth between two solder balls is shown below.

Dendritic growth at high voltage
SEM image showing extreme dendritic growth between two solder balls. Image source.

These metallic dendrites can short out two points on a high density PCB. This is actually an electric field effect, which explains why there is a minimum spacing requirement; increasing the spacing between conductors for a given potential difference reduces the field between the conductors, which inhibits dendrite growth.

    Beyond an IPC-2221 Calculator

    Note that the IPC-2221 standards are voluntary. However, for products covered by safety standards as defined in building and electrical codes, creepage and clearance requirements in the relevant UL or IEC standard may become mandatory. As an example, the relevant set of safety requirements on IT and telecom products with AC mains and battery power can be found in the IEC 62368-1 standard (this replaced the IEC 60950-1 standard). For creepage, the spacing specified under IPC-2221B depends on RMS working voltage, pollution degree (numbered 1 through 3), and material group. The definitions of the latter two terms can be found in the UL 62368-1 standards. Whether you need to comply with IEC, IPC, or other required safety standards, you can specify your design requirements as design rules when you use the right PCB design software.

    To prevent breakdown between conductors along a layer due to creepage, material selection is just as important as proper spacing between conductors. The ability for a material to resist breakdown is summarized using a metric known as the comparative tracking index (CTI). A PCB laminate material's CTI value is used to set creepage limits for conductors across the surface of a substrate. The IEC-60112 standard defines CTI values such that a larger CTI-grade substrate can withstand a higher voltage before it experiences dielectric breakdown. I'll discuss this point more in an upcoming article on high voltage PCB laminate materials and how to select them. For now, just note that creepage and clearance go together, and determining spacing based on clearance is a good place to start in a new design.

    The CAD tools and routing features in Altium Designer® are built on a unified rules-driven design engine that automatically checks your layout as you create your board. After you've figured out your clearance requirements with an IPC-2221 calculator, you can program your clearances into your design rules to ensure your board remains safe and functional at high voltage. You’ll also have access to a full set of documentation features that help you prepare for manufacturing and assembly.

    We have only scratched the surface of what is possible to do with Altium Designer on Altium 365. Start your free trial of Altium Designer + Altium 365 today.

    About Author

    About Author

    Zachariah Peterson has an extensive technical background in academia and industry. He currently provides research, design, and marketing services to companies in the electronics industry. Prior to working in the PCB industry, he taught at Portland State University and conducted research on random laser theory, materials, and stability. His background in scientific research spans topics in nanoparticle lasers, electronic and optoelectronic semiconductor devices, environmental sensors, and stochastics. His work has been published in over a dozen peer-reviewed journals and conference proceedings, and he has written 2000+ technical articles on PCB design for a number of companies. He is a member of IEEE Photonics Society, IEEE Electronics Packaging Society, American Physical Society, and the Printed Circuit Engineering Association (PCEA). He previously served as a voting member on the INCITS Quantum Computing Technical Advisory Committee working on technical standards for quantum electronics, and he currently serves on the IEEE P3186 Working Group focused on Port Interface Representing Photonic Signals Using SPICE-class Circuit Simulators.

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